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Article
Publication date: 15 July 2022

Muhammad Yasir Faheem, Muhammad Basit Azeem, Abid Ali Minhas, Shun'an Zhong and Xinghua Wang

RF transceiver module is considered a vital part of any wireless communication system. This module consists of two important parts the RF transceiver and analog-to-digital…

Abstract

Purpose

RF transceiver module is considered a vital part of any wireless communication system. This module consists of two important parts the RF transceiver and analog-to-digital converter (ADC). Usually, both these parts – RF transceiver and ADC – are used to enhance the perspective of size and power. The data processing in 4G communication makes hurdles and need research attention to make it faster and smaller in size. Accuracy and fast processing are the critical challenges in the modern communication system.

Design/methodology/approach

After theoretical and practical investigations, this research work proposes key new techniques for the RF transceiver module. These techniques will make RF transceiver small, power-efficient and on the other hand, make dual SAR-ADC more effective as well. The proposed design has no intermediate frequency where the RF transceiver is reduced its major blocks from five to four, which includes crystal oscillator, phase lock loop, power amplifier and low noise amplifier. Moreover, the shared circuitry is introduced in the architecture of the SAR-ADC for the production of dual outputs, specifically in bootstrapped switch and comparator.

Findings

The miniaturized RF transceiver and SAR-ADC are well tested separately before the plantation on the printed circuit board (PCB). The operating voltage and frequency of the RF transceiver module are 1.2 V and 5.8 GHz, where the sampling rate, bandwidth and output power are 25 MHz, 200 MHz and 5 dBm, respectively. The core area of the PCB is 58.13 mm2. The bandwidth efficiency is 93% using surface acoustic wave less transmitter. The circuit is based on the library of 90 nm CMOS technology.

Originality/value

The entire circuit is highly synchronized with the input and reference clocks to avoid self-interference.

Details

Microelectronics International, vol. 39 no. 4
Type: Research Article
ISSN: 1356-5362

Keywords

Article
Publication date: 3 February 2020

Muhammad Yasir Faheem, Shun'an Zhong, Xinghua Wang and Muhammad Basit Azeem

Successive approximation register (SAR) analogue to digital converter (ADC) is well-known with regard to low-power operations. To make it energy-efficient and time-efficient…

Abstract

Purpose

Successive approximation register (SAR) analogue to digital converter (ADC) is well-known with regard to low-power operations. To make it energy-efficient and time-efficient, scientists are working for the last two decades, and it still needs the attention of the researchers. In actual work, there is no mechanism and circuitry for the production of two simultaneous comparator outputs in SAR ADC.

Design/methodology/approach

A small-sized, low-power and energy-efficient circuitry of a dual comparator and an amplifier is presented, which is the most important part of SAR ADC. The main idea is to design a multi-dimensional circuit which can deliver two quick parallel comparisons. The circuitry of the three devices is combined and miniaturized by introducing a lower number of MOSFET’s and small-sized capacitors in such a way that there is no need for any matching and calibration.

Findings

The supply voltage of the proposed comparator is 0.7 V with the overall power consumption of 0.257mW. The input and clock frequencies are 5 and 50 MHz, respectively. There is no requirement for any offset calibration and mismatching concerns due to sharing and centralization of spider-latch circuitry. The total offset voltages are 0.13 0.31 mV with 0.3VDD to VDD. All the components are small-sized and miniaturized to make the circuit cost-effective and energy-efficient. The rise and response time of comparator is around 100 ns. SNDR improved from 56 to 65 dB where the input-referred noise of an amplifier is 98mVrms.

Originality/value

The proposed design has no linear-complexity compared with the conventional comparator in both modes (working and standby); it is ultimately intended and designed for 11-bit SAR ADC. The circuit based on three rapid clock pulses for three different modes includes amplification and two parallel comparisons controlled and switched by a latch named as “spider-latch”.

Article
Publication date: 8 March 2021

Muhammad Yasir Faheem, Shun'an Zhong, Xinghua Wang and Muhammad Basit Azeem

There are many types of the ADCs implemented in the mobile and wireless devices. Most of these devices are battery operated and operational at low input voltage. SAR ADC is…

Abstract

Purpose

There are many types of the ADCs implemented in the mobile and wireless devices. Most of these devices are battery operated and operational at low input voltage. SAR ADC is popular for its low power operations and simple architecture. Scientists are still working to make its working faster under the same low power area. There are many SAR-ADC implemented in the past two decades, but still, there is a big room for dual SAR-ADC.

Design/methodology/approach

The authors are presenting a dual SAR-ADC with a smaller number of components and blocks. The proposed ultra-low-power circuit of the SAR-ADC consists of four major blocks, which include Bee-bootstrap, Spider-Latch dual comparator, dual SAR-logic and dual digital to analog converter. The authors have used the 90-nm CMOS library for the construction of the design.

Findings

The power breaks down of the comparator are dramatically improved from 0.006 to 0.003 uW. The ultimate design has 5 MHz operating frequency with 25 KS/s sampling frequency. The supply voltage is 1.2 V with 35.724 uW power consumption. Signal-to-noise and distortion ratio and spurious-free dynamic range are 65 and 84 dB, respectively. The Walden's figure of merits calculated 7.08 fj/step.

Originality/value

The authors are proposing two-in-one circuit for SAR-ADC named as “dual SAR-ADC”, which obeys the basic equation of duality, derived and proved under the heading of proposed solution. It shows a clear difference between the performance of two circuit-based ADC and one dual circuit ADC. The number of components is reduced by sharing the work load of some key components.

Article
Publication date: 1 December 2021

Muhammad Yasir Faheem, Shun'an Zhong, Muhammad Basit Azeem and Xinghua Wang

Successive Approximation Register-Analog to Digital Converter (SAR-ADC) has been achieved notable technological advancement since the past couple of decades. However, it’s not…

Abstract

Purpose

Successive Approximation Register-Analog to Digital Converter (SAR-ADC) has been achieved notable technological advancement since the past couple of decades. However, it’s not accurate in terms of size, energy, and time consumption. Many projects proposed to make it energy efficient and time-efficient. Such designs are unable to deliver two parallel outputs.

Design/methodology/approach

To this end, this study introduced an ultra-low-power circuitry for the two blocks (bootstrap and comparator) of 11-bit SAR-ADC. The bootstrap has three sub-parts: back-bone, left-wing and right-wing, named as bat-bootstrap. The comparator block has a circuitry of the two comparators and an amplifier, named as comp-lifier. In a bat-bootstrap, the authors plant two capacitors in the back-bone block to avoid the patristic capacitance. The switching system of the proposed design highly synchronized with the short pulses of the clocks for high accuracy. This study simulates the proposed circuits using a built-in Cadence 90 nm Complementary Metal Oxide Semiconductor library.

Findings

The results suggested that the response time of two bat-bootstrap wings and comp-lifier are 80 ns, 120 ns, and 90 ns, respectively. The supply voltage is 0.7 V, wherever the power consumption of bat-bootstrap, comp-lifier and SAR-ADC are 0.3561µW, 0.257µW and 35.76µW, respectively. Signal to Noise and Distortion Ratio is 65 dB with 5 MHz frequency and 25 KS/s sampling rate. The input referred noise of the amplifier and two comparators are 98µVrms, 224µVrms and 224µVrms, respectively.

Originality/value

Two basic circuit blocks for SAR-ADC are introduced, which fulfill the duality approach and delivered two outputs with highly synchronized clock pulses. The circuit sharing concept introduced for the high performance SAR-ADCs.

Article
Publication date: 7 April 2022

Dirk De Clercq, Muhammad Umer Azeem and Inam Ul Haq

This study seeks to unpack the negative relationship between employees' political ineptness and their job performance, by proposing a mediating role of organization-induced…

Abstract

Purpose

This study seeks to unpack the negative relationship between employees' political ineptness and their job performance, by proposing a mediating role of organization-induced emotional exhaustion and a moderating role of perceived organizational unforgiveness.

Design/methodology/approach

The research hypotheses were tested with three-round survey data collected among employees and their supervisors across multiple industry sectors.

Findings

Political ineptness diminishes the likelihood that employees undertake performance-enhancing work behaviors because they perceive that their employer is draining their emotional resources. This mediating role of organization-induced emotional exhaustion is particularly salient when they perceive that organizational authorities do not forgive mistakes.

Practical implications

This study reveals a critical risk for employees who find it difficult to exert influence on others: They become complacent in their job duties, which then might further compromise their ability to leave a positive impression on others. This counterproductive process is especially prominent if organizational leaders appear unforgiving.

Originality/value

This study contributes to extant research by explicating an unexplored mechanism (organization-induced emotional exhaustion) and catalyst (organizational unforgiveness) related to the escalation of political ineptness into diminished job performance.

Article
Publication date: 28 May 2024

Dirk De Clercq, Muhammad Umer Azeem and Inam Ul Haq

This study examines how employees’ exposure to coworker undermining may lead them to miss work deadlines. It offers a particular focus on the mediating role of diminished…

Abstract

Purpose

This study examines how employees’ exposure to coworker undermining may lead them to miss work deadlines. It offers a particular focus on the mediating role of diminished organization-based self-esteem and the moderating role of justice sensitivity in this connection.

Design/methodology/approach

The research hypotheses are tested with data collected among employees and supervisors who work in various industries.

Findings

Purposeful efforts by coworkers to cause harm translate into an increased propensity to fail to complete work on time, because the focal employees consider themselves unworthy organizational members. The extent to which employees feel upset with unfair treatments invigorates this process.

Practical implications

For employees who are frustrated with coworkers who deliberately compromise their professional functioning, diminished self-worth in relation to work and the subsequent reduced willingness to exhibit timely work efforts might make it more difficult to convince organizational leaders to do something about the negative coworker treatment. Pertinent personal characteristics can serve as a catalyst of this dynamic.

Originality/value

This study contributes to extant human resource management research by detailing the link between coworker undermining and a reduced propensity to finish work on time, pinpointing the roles of two hitherto overlooked factors (organization-based self-esteem and justice sensitivity) in this link.

Details

Journal of Organizational Effectiveness: People and Performance, vol. ahead-of-print no. ahead-of-print
Type: Research Article
ISSN: 2051-6614

Keywords

Article
Publication date: 27 July 2022

Muhammad Umer Azeem, Dirk De Clercq and Inam Ul Haq

This study aims to unpack the link between co-worker incivility and job performance, by detailing a mediating role of psychological detachment and a moderating role of…

Abstract

Purpose

This study aims to unpack the link between co-worker incivility and job performance, by detailing a mediating role of psychological detachment and a moderating role of psychological capital.

Design/methodology/approach

The research hypotheses are tested with three-wave, time-lagged data collected from Pakistani-based employees and their supervisors.

Findings

An important reason that disrespectful co-worker treatment curtails job performance, with respect to both in-role and extra-role work efforts, is that employees detach from their work environment. This mediating role of psychological detachment is less salient to the extent that employees possess high levels of psychological capital.

Practical implications

For organizations, this study pinpoints a key mechanism, a propensity to distance oneself from work, by which convictions that co-workers do not show respect direct employees away from productive work activities. This study also shows how this mechanism can be subdued by ensuring that employees exhibit energy-enhancing personal resources.

Originality/value

This study expands extant research on the dark side of interpersonal co-worker relationships by revealing pertinent factors that explain why and when co-worker incivility can escalate into diminished performance-enhancing activities.

Details

International Journal of Organizational Analysis, vol. 31 no. 7
Type: Research Article
ISSN: 1934-8835

Keywords

Article
Publication date: 6 June 2023

Dirk De Clercq, Muhammad Umer Azeem and Inam Ul Haq

This study aims to investigate the relationship between employees' exposure to supervisor incivility and their engagement in insubordinate behavior, by detailing a mediating role…

Abstract

Purpose

This study aims to investigate the relationship between employees' exposure to supervisor incivility and their engagement in insubordinate behavior, by detailing a mediating role of ruminations about interpersonal offenses and a moderating role of supervisor task conflict.

Design/methodology/approach

The research hypotheses were assessed with three rounds of data, obtained from employees and their peers, working for firms in various industries.

Findings

An important reason that employees' sense that their supervisor treats them disrespectfully escalates into defiance of supervisor authority is that the employees cannot stop thinking about how they have been wronged. The mediating role of such ruminations is particularly prominent when employees' viewpoints clash with those of their supervisor.

Practical implications

A critical danger exists for employees who are annoyed with a rude supervisor: They ponder their negative treatment, which prompts them to disobey, a response that likely diminishes the chances that supervisors might change their behaviors. This detrimental process is particularly salient when employee–supervisor interactions are marked by unpleasant task-related fights.

Originality/value

This study unpacks an unexplored link between supervisor incivility and supervisor-directed insubordination by explicating the pertinent roles of two critical factors (rumination and task conflict) in this link.

Book part
Publication date: 9 October 2019

Yusuf Sidani

Abstract

Details

A Spring Aborted
Type: Book
ISBN: 978-1-78756-666-8

Article
Publication date: 5 April 2021

Syeda Hina Batool, Ata ur Rehman and Imran Sulehri

The present study focused on information literacy education through a unique research lens, i.e. the Delphi process in developing countries. The primary aim of the study is to…

Abstract

Purpose

The present study focused on information literacy education through a unique research lens, i.e. the Delphi process in developing countries. The primary aim of the study is to formulate an information literacy framework for higher education.

Design/methodology/approach

In total 13 experts from the field, including academicians and practitioners, were invited to build consensus on the components of an information literacy curriculum for library and information sciences or management postgraduate students.

Findings

The Delphi process was completed in three reasonable rounds to build consensus on eight information literacy course units, including computer, research, critical, information, domain-specific knowledge and copyright literacies in line with learning and communication skills. The panelists considered computer, research and critical literacies as the most significant components of an information literacy curriculum for postgraduates.

Practical implications

The proposed framework of information literacy curriculum may have considerable implications for educators, practitioners and researchers.

Originality/value

The study is unique as it focuses on developing a contextual and comprehensive information literacy education framework for information professionals.

Details

Library Hi Tech, vol. 40 no. 6
Type: Research Article
ISSN: 0737-8831

Keywords

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