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Key techniques of ultra-low-power ADC and miniaturized RF transceiver circuits for 4G/LTE applications

Muhammad Yasir Faheem (Department of Computer Science, COMSATS University Islamabad, Vehari Campus, Vehari, Pakistan)
Muhammad Basit Azeem (Department of Mechatronics, University of Engineering and Technology Faisalabad Campus, Faisalabad, Pakistan)
Abid Ali Minhas (Department of Computer Engineering, Al Yamamah University, Riyadh, Saudi Arabia)
Shun'an Zhong (School of Information and Electronics, Beijing Institute of Technology, Beijing, China)
Xinghua Wang (School of Information and Electronics, Beijing Institute of Technology, Beijing, China)

Microelectronics International

ISSN: 1356-5362

Article publication date: 15 July 2022

Issue publication date: 27 October 2022

90

Abstract

Purpose

RF transceiver module is considered a vital part of any wireless communication system. This module consists of two important parts the RF transceiver and analog-to-digital converter (ADC). Usually, both these parts – RF transceiver and ADC – are used to enhance the perspective of size and power. The data processing in 4G communication makes hurdles and need research attention to make it faster and smaller in size. Accuracy and fast processing are the critical challenges in the modern communication system.

Design/methodology/approach

After theoretical and practical investigations, this research work proposes key new techniques for the RF transceiver module. These techniques will make RF transceiver small, power-efficient and on the other hand, make dual SAR-ADC more effective as well. The proposed design has no intermediate frequency where the RF transceiver is reduced its major blocks from five to four, which includes crystal oscillator, phase lock loop, power amplifier and low noise amplifier. Moreover, the shared circuitry is introduced in the architecture of the SAR-ADC for the production of dual outputs, specifically in bootstrapped switch and comparator.

Findings

The miniaturized RF transceiver and SAR-ADC are well tested separately before the plantation on the printed circuit board (PCB). The operating voltage and frequency of the RF transceiver module are 1.2 V and 5.8 GHz, where the sampling rate, bandwidth and output power are 25 MHz, 200 MHz and 5 dBm, respectively. The core area of the PCB is 58.13 mm2. The bandwidth efficiency is 93% using surface acoustic wave less transmitter. The circuit is based on the library of 90 nm CMOS technology.

Originality/value

The entire circuit is highly synchronized with the input and reference clocks to avoid self-interference.

Keywords

Citation

Faheem, M.Y., Azeem, M.B., Minhas, A.A., Zhong, S. and Wang, X. (2022), "Key techniques of ultra-low-power ADC and miniaturized RF transceiver circuits for 4G/LTE applications", Microelectronics International, Vol. 39 No. 4, pp. 152-165. https://doi.org/10.1108/MI-06-2021-0054

Publisher

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Emerald Publishing Limited

Copyright © 2022, Emerald Publishing Limited

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