Search results

This paper aims to present the results of investigations of inkjet-printed electronic circuits fabricated on a flexible substrate (KAPTON foil) using silver nanoparticles ink.

Fully inkjet-printed conductive circuit tracks were printed on a flexible, transparent KAPTON foil, using a commercial 40LT-15 C nanosilver ink as well as a PixDro LP50 inkjet printer with KonicaMinnolta 512 printhead. After cure, electrical properties by resistance measurements and printing quality by optical and SEM microscopic observation of conductive tracks were examined. Afterwards, the tested samples were annealed for 1, 2 and 3 h at 150°C or subjected to cycling bending.

It was found that silver nanoparticles ink could be used for the preparation of electronic circuits using the inkjet printing technique. The obtained patterns had appropriate mapping and good quality. It was also noticed that thermal annealing caused a decrease in resistivity values of the tested lines irrespective of their width. Approximately 34 per cent decrease was achieved in the values of resistivity of all the tested lines after the first hour of thermal annealing. After the second hour, the values of resistivity decreased by another 50 per cent. There were no visible changes in resistivity values after 1,000 cycles of bending.

In this paper, the results of thermal annealing and bending tests of inkjet-printed silver nanoparticle conductive tracks on flexible substrate were presented. That is very important information for producing printed circuit boards using ecological, rapid and low-cost inkjet printing techniques, particularly during the production of printed circuit boards on flexible substrates working in different conditions of mechanical and thermal stresses.

The aim of this paper is to present non-destructive and destructive methods of failure analysis of epoxy moulded IC packages on the example of power MOSFETs in SOT-227 package.

A power MOSFET in SOT-227 package was examined twice using X-ray inspection, at first as the whole component to check if it is damaged and then after removing the upper part of package by mechanical grinding. The purpose of the second X-ray inspection was to prepare images for estimation of the total number and approximate location of voids in soft solder layers. Finally, power MOSFETs were subjected to decapsulation process using a concentrated sulphuric acid to verify existence of damage areas noticed during X-ray analysis and to observe other possible failures such as cracks in aluminium metallization or wires deformation.

X-ray analysis was revealed to be adequate technique to detect damage (e.g. meltings) in power MOSFETs in SOT-227 package, but only when tested components were analysed in the side view. This type of analysis combined with a graphic software is also suitable for voids estimation in soft solder layers. Moreover, it was found that a single acid (concentrated sulphuric acid) at elevated temperature can be successfully used for decapsulation of power MOSFETs in SOT-227 package without damage of aluminium metallization and aluminium wires. Such decapsulation process enables analysis of defects in wire, die and package materials.

Further investigations are required to examine if the presented methods of failures analysis can be used for other types of components (e.g. high power resistors) in similar packages.

The described methods of failure analysis can find application in electronic industry to select components which are free of damage and in effect which allow to produce high reliable devices. Apart from it, the presented method is applicable to evaluate reasons of improper work of tested electronic devices and to identify faked components.

This paper contains valuable information for research and technical staff involved in the assessment of electronic devices who needs practical methods of failure analysis of epoxy moulded IC packages.

The purpose of this paper is to present the result of research on a new fabrication technology of printed circuits board and electronics modules. The new method is based on inkjet printing technique on flexible substrates using new generations of heterophase inks. New fabrications method was used to print microwave waveguides and signal splitters as new technology demonstrators.

A fully Inkjet printed filter was printed on a flexible, transparent Kapton foil using heterophase inks developed in Instytut Technologii Materiałów Elektronicznych (ITME) for the purpose of this research based on graphene and silver nanoparticles.

A microwave module was printed using two types of Inkjet printers – PixDro LP50 with KonicaMinolta 512 printhead – and developed in an Instytut Tele- i Radiotechniczny (ITR) laboratory printer using MicroDrop a 100-μm glass nozzle printhead. Fully printed microwave circuits were evaluated by their print quality and electrical properties.

Fully Inkjet printed microwave circuits using the heterophase graphene ink were evaluated by their print quality and electrical properties.

The purpose of this paper was to determine the influence of thermal aging on the stability of organic light-emitting diode (OLED) glass samples made in ambient condition.

The samples with yellow emitting layer (named as ADS5) and poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate) hole transport layer were examined. Some of the devices were ultraviolet-curable epoxy encapsulation directly after performance. All samples were thermally annealed at 70°C for 1, 2, 3 and 4 hours. The characteristics current–voltage for fresh and aging samples in the range of voltage from 0-15 V were made. The temperature of OLEDs samples in real-time with a thermographic camera was measured too. Additionally, scanning electron microscope image of surface Al cathode immediately after OLED performance and after annealing tests was made.

The authors stated, that irrespective of the type, the samples were undergoing the degradation. The decrease in value of the current density was registered. That were about 44 per cent and about 24 per cent after thermally annealing the samples with and without encapsulation, respectively (at tension 13 V). Additionally, there were observed massive delamination of the metal cathode.

Influence of thermal annealing and encapsulation on the dynamic characteristics of the OLED devices fabricated in ambient condition was analyzed. There are not many papers in the literature describing examinations of OLED samples which were made in environmental conditions.

The purpose of this paper is to report surface properties of treated Teonex Du Pont polyethylene naphthalate (PEN) foil substrates.

There were three different cleaning treatments among other: argon glow discharge, dipping into alkaline solution at 60°C as well as washing in an ultrasonic bath of acetone and ethyl alcohol in room temperature. The relation between PEN foil morphology and surface properties has been studied by contact angle measurements as well as evaluation of surface roughness of PEN foil samples by atomic force microscopy (AFM).

It was found that argon glow discharge (T3) of PEN treatment caused the maximum reduction in both values of contact angles. In addition, the argon glow discharge yielded the highest PEN surface energy (51.9 mJ/m2) and polarity (0.89). On the other hand, the AFM micrographs showed that the samples T3 had the highest value of average and root mean square surface roughness. Based on the experiments results, the authors stated that the alkaline cleaning (T2 treatment) could be considered as an effective method of PEN substrate treatment.

The influence of different cleaning treatment on the surface properties of PEN foil to inkjet application was analyzed. In the literature, there are not a lot of papers describing examinations of surface properties of PEN foil to inkjet application by contact angle measurements and AFM analysis.

The purpose of this paper is to evaluate the reliability of solder joints made on long FR-4 and metal core printed circuit boards using the accelerated thermal cycling.

Solder joints of diodes and resistors samples made on long FR-4 and aluminum (Al) core printed circuit boards were examined. Two kinds of solder pastes were used for the samples preparation. All samples were subjected to temperature aging cycles (−40°C – 3 hours/+85°C – 3 hours). Solder joints resistance, X-Ray inspection and metallographic cross-sections for samples as received and after 100, 500 and 1,000 hours of thermal cycles were utilized for solder joints assessment.

It was stated that 1,000 hours of thermal cycles were enough to show reliability problems in solder joints on long and/or AL core printed circuit board assembly (PCBA). The solder joints of R1206 components were the most sensitive reliability elements. The solder joints of LED diodes are more reliable than solder joints of R1206 resistors. Solder joints made on FR-4 substrate were about two times more reliable than ones on AL core substrate. Cracks in solder joints were the visible reason of solder joints failures.

The influence of thermal cycles on the reliability of solder joints on long, FR-4 and metal core printed circuit boards were presented. Findings from this paper can be used for planning of reliability trials during validation of reflow processes of products containing long or long metal core printed circuit boards (PCBs).

The purpose of this study was the use of embedded components technology and innovative concepts of the printed circuit board (PCB) for electronic modules containing field-programmable gate array (FPGA) devices with a large number of pins (e.g. Virtex 6, FF1156/RF1156 package, 1,156 pins).

In the multi-layered boards, embedded passive components that support FPGA device input/output (I/O), such as blocking capacitors and pull-up resistors, were used. These modules can be used in rapid design of electronic devices. In the study, the MC16T FaradFlex material was used for the inner capacitive layer. The Ohmega-Ply RCM 25 Ω/sq material was used to manufacture pull-up resistors for high-frequency pins. The embedded components have been connected to pins of the FPGA component by using plated-through holes for capacitors and blind vias for resistors. Also, a technique for a board-to-board joining, by using castellated terminations, is described.

The fully functional modules for assembly of the FPGA were manufactured. Achieved resistance of embedded micro resistors, as small as the smallest currently used surface-mount device components (01005), was below required tolerance of 10 per cent. Obtained tolerance of capacitors was less than 3 per cent. Use of embedded components allowed to replace the pull-up resistors and blocking capacitors and shortens the signal path from the I/O of the FPGA. Correct connection to the castellated terminations with a very small pitch was also obtained. This allows in further planned studies to create a full signal distribution system from the FPGA without the use of unreliable plug connectors in aviation and space technology.

This study developed and manufactured several innovative concepts of signal distribution from printed circuit boards. The signal distribution solutions were integrated with embedded components, which allowed for significant reduction in the signal path. This study allows us to build the target object that is the module for rapid design of the FPGA device. Usage of a pre-designed module would lessen the time needed to develop a FPGA-based device, as a significant part of the necessary work (mainly designing the signal and power fan-out) will already be done during the module development.