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The purpose of this paper is to electrically examine the quality of thin thermally grown SiO₂ with thickness variation, on Si‐face of 4H‐SiC <0001> (having 50 μm epitaxial layer) by current‐voltage (I‐V) and capacitance‐voltage (C‐V) methods.

Metal‐oxide‐silicon carbide (MOSiC) structures with varying oxide thickness have been fabricated on device grade 4H‐SiC substrate. Ni has been used for gate metal on thermally oxidized Si‐face and a composite layer of Ti‐Au has been used for Ohmic contact on the highly doped C‐face of the substrate. Each structure was diced and bonded on a TO‐8 header with a suitable wire bonding for further testing using in‐house developed LabVIEW‐based computer aided measurement setup.

The leakage current of fabricated structures shows an asymmetric behavior with the polarity of gate bias ( + V or −V at the anode). A strong relation of oxide thickness and temperature on effective barrier height at SiO₂/4H‐SiC interface as well as on oxide charges have been established and reported in this paper.

The paper focuses on the development of 4H‐SiC based device technology in the fabrication of MOSiC‐based integrated structures.

The purpose of this study was to investigate the performance of a single-bridge ZnO nanorod as a photodetector.

The fabrication of the design sensor with ∼6-μm gap Schottky contacts and bridging of the ZnO nanorod were based on conventional photolithography and wet-etching technique. Prior to bridging, the ZnO nanorods were grown by the hydrothermal process. The 0.35 M seed solution was prepared by dissolving zinc acetate dihydrate in 2-methoxyethanol, and monoethanolamine, which acts as a stabilizer, was added drop-wise. Before starting the solution deposition, and oxide, titanium (Ti) and gold (Au) layer deposition, p-type (100) silicon substrate was cleaned with Radio Corporation of America (RCA1) and RCA2, followed by dipping in diluted hydrofluoric acid. The aged solution was dropped onto the surface of the Au microgap structure, using a spin coater at a spinning speed of 3,000 rpm for 45 seconds, and then dried at 300°C for 15 minutes, followed by annealing at 400°C for 1 hour. The hydrothermal growth was carried out in an aqueous solution of zinc nitrate hexahydrate (0.025 M) and hexamethyltetramine (0.025 M).

In this study, ZnO nanorods were grown on a SiO₂ substrate by the hydrothermal method. Microgap electrodes with ∼6-μm spacing were achieved by using the wet-etching process. After the growth process, an area-selective mask was utilized to reduce the number of rods between the nearby gap areas. The obtained single ZnO nanorod was tested for the UV-sensing application. The single ZnO nanorod photodetector exhibited a UV photoresponse, thereby indicating potential as a cost-effective UV detector. The response and recovery times of the fabricated device were 65 and 95 seconds, respectively. Structural analysis was captured using X-ray Diffraction (XRD), whereas surface morphology was determined using scanning electron microscopy.

This paper demonstrates the effect of UV photon on a single-bridge ZnO nanorod between microgap electrodes.

The purpose of this study is to directly measure and determine the Si/SiO2/AlOxNy interface state density on metal insulator semiconductor field effect transistor (MISFET) structures. The primary advantage of using aluminum oxynitride (AlOxNy) is the perfectly controlled variability of the properties of these layers depending on their stoichiometry, which can be easily controlled by the parameters of the magnetron sputtering process. Therefore, a continuous spectrum of properties can be achieved from the specific values for oxide to the specific ones for nitride, thus opening a wide range of applications in high power, high temperature and high frequency electronics, optics and sensors and even acoustic devices.

The basic subject of this study is n-channel transistors manufactured using silicon with 50-nm-thick AlOxNy films deposited on a silicon dioxide buffer layer via magnetron sputtering in which the gate dielectric was etched with wet solutions and/or dry plasma mixtures. Furthermore, the output, transfer and charge pumping (CP) characteristics were measured and compared for all modifications of the etching process.

An electrical measurement of MISFETs with AlOxNy gate dielectrics was conducted to plot the current-voltage and CP characteristics and examine the influence of the etching method on MISFET parameters.

In this report, a flat band and threshold voltage and the density of interface traps were determined to evaluate and improve an AlOxNy-based MISFET performance toward highly sensitive field effect transistors for hydrogen detection by applying a Pd-based nanocrystalline layer. The sensitivity of the detectors was highly correlated with the quality of the etching process of the gate dielectrics.

The purpose of this paper is to present the influence of gate dielectric etching on obtained MISFET (metal insulator semiconductor field effect transistor) structures. Because of its properties, aluminum nitride (AlN) layers can be successfully used in a large area of applications. In addition, AIN has a wide bandgap (6.2eV) and high thermal conductivity (3.2 W/cm * K). Its melting temperature is greater than 2,000°C. The relative permittivity is about 9. All these features (especially high power, high temperature and high-frequency) make AlN a useful material in the fields of electronic, optical and acoustic applications.

To fabricate n-channel transistors, silicon technology was used. The 50-nm thick AlN films were deposited using the magnetron sputtering. After preparation of SiO₂/AlN stack as the gate dielectric, the optimization processes of dry etching in plasma environment by Taguchi method were realized. In the next step, three methods of AlN etching were selected and used to MISFET device fabrication. Atomic force microscopy and scanning electron microscopy allowed to surfacing of the state observation after etching process. The current–voltage (I–V) output and transfer characteristics of structures with modified etch technology were measured. Keithley SMU 236/237/238 measurement set was used.

In this research work, a method of AlN etching in a field effect transistor technology was developed and improved. Current−voltage characteristics of obtained MISFET structures were measured and compared. Influence of etching procedure on transistors properties was examined.

The obtained results allow improving the MISFET technology based on AlN film as a gate dielectric. The complete research work will allow using the developed technologies to implement in highly sensitive ion-sensitive field effect transistor (ISFET) structures in the future. The improvement of the etching element in the technology strongly influences the detection capabilities and operating range of the transistor.

This paper aims to describe two manufacturing techniques for selective patterning of Poly‐3‐4‐ethyleneoxythiophene/poly‐4‐sytrensulfonate (PEDOT/PSS) for flexible electronic applications. The paper also includes methods to tailor the electrical conductivity of the patterned polymeric films.

Line patterning and inkjet printing methods were used to pattern PEDOT/PSS onto mechanically flexible substrates including polyethylene terephthalate, polyimide and paper.

PEDOT/PSS thin films with controlled spatial resolution and strong adhesion passing a laboratory Scotch‐tape test were patterned onto flexible substrates using both line patterning and inkjet printing techniques. After annealing, the sheet resistivities of patterned PEDOT/PSS lines increased slightly. Treating the electrodes with ethylene glycol dramatically increased the electrical conductivity.

There has been extensive work on selective deposition of solution processable active materials onto mechanically flexible substrates. Many techniques including line patterning and inkjet printing are currently being used to fabricate devices for flexible electronic applications. However, there is a need for tailoring the electrical conductivity of the patterned polymeric active materials.

In this study, two very cost effective methods for the selective deposition of the water soluble PEDOT/PSS onto flexible substrates with controlled spatial resolution and electrical conductivity are reported.

The purpose of this paper is to investigate the electrical transport mechanism of the Al‐doped ZnO nanorods at different temperatures by employing impedance spectroscopy.

Al‐doped ZnO nanorods were grown on silicon substrate using step sol‐gel method. For the seed solution preparation Zinc acetate dihydrate, 2‐methoxyethanol, monoethanolamine and aluminum nitrite nano‐hydrate were used as a solute, solvent, stabilizer and dopant, respectively. Prior to the deposition, P‐type Si (100) wafer was cut into pieces of 1 cm×2 cm. The samples were then cleaned in an ultrasonic bath with acetone, ethanol, and de‐ionized (DI) water for 5 min. The prepared seed solution was coated on silicon substrate using spin coater at spinning speed of 3000 rpm for 30 s and then dried at 250°C for 10 min followed by annealing at 550°C for 1 h. The hydrothermal growth was carried out in a solution of zinc nitrate hexahydrate (0.025M), Hexamethyltetramine (0.025M) in DI water.

Al‐doped ZnO nanorods were characterized using scanning electron microscope (SEM), X‐ray diffraction (XRD) and impedance spectroscopy. The impedance measurements were carried out at various temperatures (100°C‐325°C). The impedance results showed that temperature has great influence on the impedance; the impedance value decreased as the temperature increased. This decrement is attributed to the increase of the mobility of the defects, especially the oxygen vacancies. The surface morphology of the samples was measured by SEM and X‐ray diffraction. The SEM images show that the high density of Al‐doped ZnO nanorods covers the silicon substrate, whereas the XRD pattern shows the (002) crystal orientation.

This paper demonstrates the electron transport mechanism of Al‐doped ZnO nanorods, at different temperatures, to understand the charge transport model.

The purpose of this research work is to harvest energy using the piezoelectric properties of ZnO nanowires (NW). Fabrication and characterization of the piezoelectric nanogenerator (NG), based on Al/ZnO/Au structure without using hosting layer, were done to harvest energy. The proposed method has full potential to harvest the cost-effective energy.

ZnO NW were fabricated between the thin layers of Al- and Au-coated substrates for the development of piezoelectric NG. To grow ZnO NW, ZnO seed layer was prepared on the Al-coated substrate, and then ZnO NW were grown by aqueous chemical growth method. Finally, Au top electrode was used to conclude the Al/ZnO/Au NG structure. The Al and Au electrodes were used to establish the ohmic and Schottky contacts with ZnO NW, respectively.

Surface morphology of the fabricated device was done by using scanning electron microscopy, and electrical characterization of the sample was performed with digital oscilloscope, picoammeter and voltmeter. The energy harvesting experiment was performed to excite the presented device. The fabricated piezoelectric-sensitive device revealed the maximum open circuit voltage up to 5 V and maximum short circuit current up to 30 nA, with a maximum power of 150 nW. Consequently, it was also shown that the output of the fabricated device was increased by applying the stress. The presented work will help for the openings to capture the mechanical energy from the surroundings to power up the nano/micro-devices. This research work shows that NGs have the competency to build the self-powered nanosystems. It has potential applications in biosensing and personal electronics.

The fabrication of simple and cost-effective piezoelectric NG is done with a structure of Al/ZnO/Au without using hosting layer. The presented method elucidates an efficient and cost-effective approach to harvest the mechanical energy from the native environment.

The purpose of this paper is to design and construct a low‐cost current‐voltage tester, bearing in mind the short falls of the existing testers and the ever‐increasing price of the testers currently on the market. The I‐V tracer presented in this paper uses a variable external power supply unit (PSU) as the load, in order to obtain the entire operating range of a PV module from open circuit through maximum power to short circuit condition.

The I‐V tracer presented in this paper was divided into three main sections, mainly the data acquisition system (DAS), which comprises an A/D computer card, temperature card, electromechanical relays, current and voltage transducers, aluminum housed resistors and power MOSFETS, the variable load (programmable variable PSU) and finally the signal processing unit. These components were integrated and finally interfaced to a PC.

The results obtained using this system compared with the capacitive tester show a low percentage difference of <1 from the comparative I‐V curves measured. The results measured by the PSU tester are also of high accuracy. The findings also demonstrated the fact that most of the components found in most university laboratories can be used to build the PSU tester and still obtain highly accurate results.

Since some components are semiconductors, which have a limited lifetime, they need to be changed if they fail. Mostly the MOSFETS should be replaced when no switching signal is sent.

This low‐cost PSU tester is suitable for researchers in disadvantaged institutions whose research capabilities are limited due to the high cost of this equipment.

The PSU tester uses a variable power supply as the load to measure PV module I‐V curves. The system is capable of measuring up to eight modules at the same time, making it possible to analyze PV modules within the same time frame.

An empirical velocity‐field relationship, based on Monte Carlo simulation, is used to modify a drift‐diffusion model for the characterization of short gate GaAs MESFET's. The modified drift‐diffusion model is used to generate both the steady‐state and the small‐signal parameters of submicron GaAs MESFET's. The current, transconductance, and cutoff frequency are compared with two‐dimensional Monte Carlo simulation results on a 0.2 µm gate‐length. The model is also used to predict measured I‐V and s‐parameters of a 0.5 µm gate‐length ion‐implanted GaAs MESFET. The comparison and the analysis made, support the accuracy of the modified drift‐diffusion simulator and makes it computationally efficient for analysis of short‐gate devices.

The purpose of this paper is to examine the growth and characterization of the two different compound semiconductors, namely, n-zinc oxide (ZnO) and p-gallium antimonide (GaSb). In this paper, fabrication and characterization of n-ZnO/p-GaSb heterojunction diode is analyzed.

Thermo vertical direction solidification (TVDS) method was used to synthesize undoped GaSb ingot from high purity Ga (5N) and Sb (4N) host materials. Thermal evaporation technique is used to prepare a film of GaSb on glass substrate from the pre-synthesized bulk material by TVDS method. Undoped ZnO film was grown on GaSb film by sol–gel method by using chemical wet and dry (CWD) technique to fabricate n-ZnO/p-GaSb heterojunction diode.

The formation of crystalline structure and surface morphological analysis of both the GaSb bulk and film have been carried out by x-ray diffraction (XRD) analysis and scanning electron microscopy analysis. From the XRD studies, the structural characterization and phase identification of ZnO/GaSb interface. The current–voltage characteristic of the n-ZnO/p-GaSb heterostructure is found to be rectifying in nature.

GaSb film growth on any substrate by thermal evaporation method taking a small piece of the sample from the pre-synthesized GaSb bulk ingot has not been reported yet. Semiconductor device with heterojunction diode by using two different semiconductors such as ZnO/GaSb was used by this group for the first time.