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These implementations not only generate excessive voltage levels to enhance the quality of power but also include a detailed investigating of the various modulation methods and control schemes for multilevel inverter (MLI) topologies. Reduced harmonic modulation technology is used to produce 11-level output voltage with the production of renewable energy applications. The simulation is done in the MATLAB/Simulink for 11-level symmetric MLI and is correlated with the conventional inverter design.

This paper is focused on investigating the different types of asymmetric, symmetric and hybrid topologies and control methods used for the modular multilevel inverter (MMI) operation. Classical MLI configurations are affected by performance issues such as poor power quality, uneconomic structure and low efficiency.

The variations in both carrier and reference signals and their performance are analyzed for the proposed inverter topologies. The simulation result compares unipolar and bipolar pulse-width modulation (PWM) techniques with total harmonic distortion (THD) results. The solar-fed 11-level MMI is controlled using various modulation strategies, which are connected to marine emergency lighting loads. Various modulation techniques are used to control the solar-fed 11-level MMI, which is connected to marine emergency lighting loads. The entire hardware system is controlled by using SPARTAN 3A field programmable gate array (FPGA) board and the least harmonics are obtained by improving the power quality.

The simulation result compares unipolar and bipolar PWM techniques with THD results. Various modulation techniques are used to control the solar-fed 11-level MMI, which is connected to marine emergency lighting loads. The entire hardware system is controlled by a SPARTAN 3A field programmable gate array (FPGA) board, and the power quality is improved to achieve the lowest harmonics possible.

The conventional two-level inverter suffers from harmonics, higher direct current (DC) link voltage requirement, higher dv/dt and heating of the rotor. This study aims to overcome by using a multilevel inverter for brushless DC (BLDC) drive.

This paper presents a comparative analysis of the conventional two-level and three-level multilevel inverter for electric vehicle (EV) application using BLDC drive.

A three-level Active Neutral Point Clamped Multilevel inverter (ANPCMLI) is proposed in this paper which provides DC link voltage control. Simulation studies of the multilevel inverter and BLDC motor is carried out in MATLAB.

The ANPCMLI fed BLDC simulation results shows that there is the significant reduction in the BLDC motor torque ripple, switching stress and harmonic distortion in the BLDC motor fed ANPCMLI compared to the conventional two-level inverter. A prototype of ANPCMLI fed BLDC drive along with field programmable gate array (FPGA) control is built and MATLAB simulation results are verified experimentally.

The purpose of this paper is to design a cascaded Multilevel inverter with reduce number of switches for high power applications. This paper came up with an innovative three-phase multilevel inverter (MLI) topology, which is a cascaded structure based on classical three-legged voltage source inverter (VSI) bridges as an individual module. The prominent advantage of this topology is that it requires only one direct current (DC) link system. The main characteristic of it is that a higher number of voltage levels can be achieved with considerably a smaller number of semiconductor switches, which improves the reliability, power quality, cost and size of the system significantly.

The individual modules are cascaded through three-phase transformers to provide higher voltage at the output with the higher number of voltage levels. In this work, the phase-shifted pulse width modulation technique is implemented to verify the result.

The proposed topology is compared with three-phase cascaded H-bridge MLI (CHB-MLI) and a modified CHB-MLI topology and found better in many aspects. The proposed MLI can produce a higher number of voltage levels with fewer semiconductor switches and associated triggering circuitry. As the device count in the proposed MLI is less compared to other MLI discussed, it tends to have less switching and conduction loss which increases the efficiency and reliability. As the number of level increases, the voltage profile and the total harmonic distortion of the proposed MLI improves.

This is a transformer-based modular cascaded MLI, which is based on classical VSI bridges. Here in this topology, a single module provides all three phases. So, a single string of cascaded modules is enough for three-phase multilevel voltage generation.

Traditional level inverter technology has drawbacks in the aspect of Total harmonic distortion (THD) and switching losses for higher frequencies. Due to these drawbacks, two-level inverters have become unprofitable for high-power applications. Multilevel inverters (MLIs) are used to enhance the output waveform characteristics (i.e. low THD) and to offer various inverter topologies and switching methods.

MLIs are upgraded versions of two-level inverters that offer more output levels in current and voltage waveforms while lowering the dv/dt and di/dt ratios. This paper aims to review and compare the different topologies of MLI used in high-power applications. Single and multisource MLI's working principal and switching states for each topology are demonstrated and compared. A Simulink model system integrated using detailed circuit simulations in developed in MATLAB®–Simulink program. In this system, a constant voltage source connected to MLI to feed asynchronous motor with squirrel cage rotor type is used to demonstrate the efficacy of the MLI under different varying speed and torque conditions.

MLI has presented better control and good range of system parameters than two-level inverter. It is suggested that the MLIs like cascade-five-level and NPC-five-level have shown low current harmonics of around 0.43% and 1.87%, respectively, compared to two-level inverter showing 5.82%.

This study is the first of its kind comparing the different topologies of single and multisource MLIs. This study suggests that the MLIs are more suitable for high-power applications.

Multilevel inverter (MLI) is an established design approach for inverter applications in medium-voltage and high-voltage range of applications. An asymmetric design synthesizes multiple DC input voltage sources of unequal magnitudes to generate a high-quality staircase sinewave comprising a large number of steps or levels. However, the implications of using sources of unequal magnitudes results in the requirements of a large variety of inverter switches and higher magnitudes of the total blocking voltage (TBV) rating of the inverter, which increase the cost. The purpose of this study is to present a solution based on algorithms for establishing DC source magnitudes and other design parameters.

The approach used in this study is to develop algorithms that bring an asymmetric cascaded MLI (ACMLI) design close to symmetric design. This approach then reduces the variety of switch ratings and minimizes the TBV of the inverter. Thus, the benefits of both asymmetric design (generation of a large number of voltage levels in the output waveform) and symmetric design (modularity) are achieved. The proposed algorithms can be applied to a number of ACMLI topologies, including classical cascaded H-bridge (CHB). The effectiveness of the proposed algorithms is validated by simulation in Matlab-Simulink and experimental setup.

Two new algorithms are proposed that reduce the number of variety of switches to just three. The variety can further be reduced to two under a specified condition. The algorithms are compared with the existing ones, and the results are promising in minimizing the TBV rating of the inverter, which results in cost reduction as well. For a specific case of four CHBs, the proposed Algorithm-1 produced 27% and Algorithm-2 produced 53% higher levels. Moreover, the presented algorithms produced minimum values of the TBV and resulted in minimum cost of inverter.

The proposed algorithms are novel in structure and have achieved the targeted values of minimized switch variety and reduced TBV ratings. Due to less variety, the inverter achieves a near symmetric design, which enables to attain the added advantages of modularity and reduced difference of power sharing among the DC sources.

In this paper, a new application of the Selected Harmonic Elimination Pulse Width Modulation (SHEPWM) technique used in the cascade multilevel inverter topology which is formed by series connections of one‐phase bridge type inverters (H‐bridge) is introduced. The advantage of the SHEPWM technique is its ability to operate in low switching frequency that makes it suitable for high power applications.

First, the switching angles are calculated using constrained optimization technique. By using these switching angles, the fundamental harmonic can be controlled and the selected harmonics can be eliminated. Then, using these calculated switching angles, a set of equation is formed which calculate the switching angles with respect to the modulation index. The switching angles at any modulation index can be easily obtained by solving the equation set. In this study, this equation set has been solved online using dSPACE DS1103 controller board. Using this technique, three‐phase voltages have been obtained from a five‐level cascade inverter. These voltages are applied to an induction motor.

The simulation results are verified by the experimental results. The results show that selected harmonics can be eliminated and an ac voltage with variable amplitude and frequency can be obtained using the proposed technique.

This paper presents a new application of the (SHEPWM) technique for multilevel inverters.

This study aims to propose a modified topology for an asymmetric multilevel inverter as a basic module that generates 13-level output voltage waveform. The basic module consists of eight switches (unidirectional and bidirectional switch) and four DC voltage sources with unequal magnitudes. The proposed topology reduces the number of switches, isolated DC sources, cost and size of the circuit significantly as compared to other topologies. In addition, the proposed circuit provides a modular structure for a multilevel inverter.

The proposed configuration is implemented through simulation and hardware development of a single-phase 13-level inverter prototype. A multicarrier-based pulse width modulation scheme is adopted for generating switching signals by using dSPACE real-time controller.

To demonstrate the advantages of the proposed configuration, a comparative analysis is carried out with other multilevel topologies in terms of number of switches, gate driver circuits, on-state switches and blocking voltage on the switches. The comparison results confirmed that the proposed configuration requires less number of components for the same number of voltage levels. Moreover, the peak inverse voltage on switches and losses is lower in the proposed configuration.

In the available literature, numerous topologies are presented with main emphasis on the reduced components count. In this study, the authors proposed a new topology for an asymmetrical source configuration. The performance of the proposed topology under steady-state and dynamic conditions is evaluated using simulation and experimental implementation.

Multilevel inverters (MLIs) have been studied widely over the past two decades because of their inherent advantages and interesting features. However, most of the newly introduced structures suffer from the increased standing voltage of the switches, which is defined as the maximum off-state voltage on the switches, losing modularity and increased number of direct current (DC) voltage sources. The purpose of this study is to propose a new hybrid MLI topology to alleviate the mentioned problems.

The proposed approach in this study includes using the advantage of two different topologies and combine them in a way that the advantages of both of the topologies are achieved. Therefore, the approach is to design a hybrid topology from two existing topologies so that a new topology has resulted.

This paper proposes a new hybrid MLI with lower power electronic switches and lowers DC voltage sources in comparison with the classic structures. The proposed MLIs maintain a balance between the number of switches, the standing voltage on the switches and the number of DC sources. The topology description, modulation method and comparative study have been presented. Also, another more reduced structure is presented for higher power factor operation. The MATLAB simulation and experimental results of a nine-level inverter have been presented to verify its operation.

The hybrid topology has a new structure that has not been presented before. It is important to emphasize that the topology combination and achieving the hybrid topology is wisely accomplished to improve some features of the MLI.

The aim of this paper is to improve and adapt cascaded multilevel converters for electric vehicles (EVs) to have all the advantages of these converters and to eliminate its limitation in the use of EVs applications. Specifically, the purpose is to use only a single power source (battery pack, fuel cell, etc.) and to generate a higher power‐quality than regular multilevel converters.

This paper is based in a cascaded multilevel converter conformed by two 3‐level inverters connected in series. The voltage sources of the auxiliary inverter were replaced by floating capacitors which work as active filters, reducing the power sources to one. The floating capacitor voltages were controlled by a PI controller that adjusts the modulation index (m) to obtain a zero average power in the auxiliary inverters, and a predictive control selects the optimal redundant state to reduce the error and balance all the capacitor voltages. As the modulation index is determined by the PI controller, the output voltage magnitude must be controlled by a variable voltage source (e.g. buck‐boost chopper). Additionally, the converter works with new optimal voltage asymmetries to obtain higher power quality and capacitor control stability.

The proposed converter uses a topology that conventionally generates 9‐levels of voltage, but with the proposed asymmetry is as generate 11‐levels. Also, the auxiliary power sources were eliminated.

The proposed solution has a limited dynamic response due to the variation rate of the capacitor voltage, which is limited by the load current and the capacitance. However, the dynamic response and control stability is satisfactory for EVs applications.

The paper presents a new control to manage the floating capacitor voltages and uses new voltage asymmetries in cascaded multilevel converters.

This paper aims to propose a new MLI topology with reduced number of switches for photovoltaic applications. Multilevel inverters (MLIs) have been found to be prospective for renewable energy applications like photovoltaic cell, as they produce output voltage from numerous separate DC sources or capacitor banks with reduced total harmonic distortion (THD) because of a staircase like waveform. However, they endure from serious setbacks including larger number of capacitors, isolated DC sources, associated gate drivers and increased control difficulty for higher number of voltage levels.

This paper proposes a new three-phase multilevel DC-link inverter topology overpowering the previously mentioned problems. The proposed topology is designed for five and seven levels in Matlab/Simulink with gating pulse using multicarrier pulse width modulation. The hardware results are shown for a five-level MLI to witness the viability of the proposed MLI for medium voltage applications.

The comparison of the proposed topology with other conventional and other topologies in terms of switch count, DC sources and power loss has been made in this paper. The reduction of switches in proposed topology results in reduced power loss. The simulation and hardware show that the output voltage yields a very close sinusoidal voltage and lesser THD.

The proposed topology can be extended for any level of output voltage which is helpful for sustainable source application.