Review of multilevel inverter for high-power applications

Abdulwasa B. Barnawi (Department of Electrical Engineering, College of Engineering, King Khalid University, Abha, Saudi Arabia)
Abdull Rahman A. Alfifi (Department of Electrical Engineering, College of Engineering, King Khalid University, Abha, Saudi Arabia)
Z.M.S. Elbarbary (Department of Electrical Engineering, College of Engineering, King Khalid University, Abha, Saudi Arabia)
Saad Fahed Alqahtani (Department of Electrical Engineering, College of Engineering, King Khalid University, Abha, Saudi Arabia)
Irshad Mohammad Shaik (Department of Electrical Engineering, College of Engineering, King Khalid University, Abha, Saudi Arabia)

Frontiers in Engineering and Built Environment

ISSN: 2634-2499

Article publication date: 11 October 2023

Issue publication date: 14 May 2024

814

Abstract

Purpose

Traditional level inverter technology has drawbacks in the aspect of Total harmonic distortion (THD) and switching losses for higher frequencies. Due to these drawbacks, two-level inverters have become unprofitable for high-power applications. Multilevel inverters (MLIs) are used to enhance the output waveform characteristics (i.e. low THD) and to offer various inverter topologies and switching methods.

Design/methodology/approach

MLIs are upgraded versions of two-level inverters that offer more output levels in current and voltage waveforms while lowering the dv/dt and di/dt ratios. This paper aims to review and compare the different topologies of MLI used in high-power applications. Single and multisource MLI's working principal and switching states for each topology are demonstrated and compared. A Simulink model system integrated using detailed circuit simulations in developed in MATLAB®–Simulink program. In this system, a constant voltage source connected to MLI to feed asynchronous motor with squirrel cage rotor type is used to demonstrate the efficacy of the MLI under different varying speed and torque conditions.

Findings

MLI has presented better control and good range of system parameters than two-level inverter. It is suggested that the MLIs like cascade-five-level and NPC-five-level have shown low current harmonics of around 0.43% and 1.87%, respectively, compared to two-level inverter showing 5.82%.

Originality/value

This study is the first of its kind comparing the different topologies of single and multisource MLIs. This study suggests that the MLIs are more suitable for high-power applications.

Keywords

Citation

Barnawi, A.B., Alfifi, A.R.A., Elbarbary, Z.M.S., Alqahtani, S.F. and Shaik, I.M. (2024), "Review of multilevel inverter for high-power applications", Frontiers in Engineering and Built Environment, Vol. 4 No. 2, pp. 77-89. https://doi.org/10.1108/FEBE-05-2023-0020

Publisher

:

Emerald Publishing Limited

Copyright © 2023, Abdulwasa B. Barnawi, Abdull Rahman A. Alfifi, Z.M.S. Elbarbary, Saad Fahed Alqahtani and Irshad Mohammad Shaik

License

Published in Frontiers in Engineering and Built Environment. Published by Emerald Publishing Limited. This article is published under the Creative Commons Attribution (CC BY 4.0) licence. Anyone may reproduce, distribute, translate and create derivative works of this article (for both commercial and non-commercial purposes), subject to full attribution to the original publication and authors. The full terms of this licence may be seen at http://creativecommons.org/licences/by/4.0/legalcode


1. Introduction

Inverters are DC-to-AC converters that use semiconductor switching devices to transfer electric energy parameter (i.e. voltage, current and/or frequency) at a desired value. Two-level inverters were introduced first. But the significant increase in the applications that requires DC-AC conversion has sparked the studies in inverter technologies (Balal et al., 2022; Orfanoudakis et al., 2010; Rahman and Saleh, 2011). However, two-level inverter soon became less-efficient for most of applications due to high total harmonic distortion (THD) in the output waveforms, switching losses and its limitations for medium voltage application due to dv/dt stress over semiconductor switches (Najafi and Yatim, 2011). To overcome these issues, higher switching frequency is used with a suitable filter to achieve output sinusoidal waveform. However, this will create a problem of switching losses (Balal et al., 2022). Multilevel inverters (MLIs) are used to archive better performance using variety of techniques to overcome the limitations of two-level inverter. MLIs are upgraded versions of two-level inverters that offer more output levels in current and voltage waveforms while lowering the dv/dt and di/dt ratios. Depending on the supply type, such as current source inverters (CSIs) or voltage source inverters (VSIs), the output waveforms are produced as staircases of current or voltage. To obtain low THD, by increasing the number of voltage levels, a suitable topology is illustrated in Figure 1. Approximately, 28.88% of THD for three-level flying-capacitor MLI would be decreased to 18.56% with the use of five-level MLI of the same topology (Rana et al., 2019). Also, it is shown that the two-level inverter with 1 kHz switching frequency generates 115% voltage THD, whereas MLIs develop only 22% and 32% voltage THD (Nordvall, 2011). With this significant difference between the two-level and multilevel techniques, MLI has been opted as the preferable one for many applications like renewable energy (solar/wind power inverters) up to megawatt (MW) power levels and motor-drive applications (Abd Halim et al., 2016). The advantages of MLI are listed as:

  1. Superior efficiency due to lower switching frequencies.

  2. MLI enhances power quality and dynamic stability for the connected utilities.

  3. Lower switching stress over the semiconductors.

  4. Because to its modular and straightforward design, they can be built up to virtually infinite levels.

  5. MLI can be considered as an ideal interface between the utilities and renewable energy sources (Balal et al., 2022; Najafi and Yatim, 2011; Abd Halim et al., 2016).

A comparison between the conventional two-level inverter and MLI is presented in Table 1 (Suresh, 2016).

Table 2 illustrates the resulted THD for conventional two-level and MLIs (Nordvall, 2011).

This paper aims to present an overview of different MLI schemes to identify the pros and cons of each topology. To identify the efficacy of the MLI, a model for MLI with Induction Motor drive (IM) in MATLAB Simulink is developed. At different speed and torque variations, the voltage and current THD responses are obtained and analyzed to demonstrate the inverter performance at different loads.

2. Topologies of multilevel inverter

There are two types of MLIs based on the number of voltage sources utilized to feed the MLIs as follows (Wu and Narimani, 2017a; Akagi, 2019):

  1. Single DC source.

  2. Multiple DC source.

A single voltage source is divided into a number of capacitors to acquire different voltage levels, whereas the second type requires different sources of voltage, whether from multiple batteries or through separate convertor rectifiers linked to renewable energy sources or many others. The classification of MLI is presented in Figure 1.

2.1 Multiple DC source

The MLI topology that uses multiple voltage supplies is cascaded H-bridge (Saleh and Rahman, 2011). This topology uses multiple units of identical H-bridge power cells connected in a series chain to produce high ac voltages. Each power cell is connected to separate and equal DC voltage supply. Advantages can be obtained from the modular structure contributes to low production costs. Also, redundant switching patterns can be achieved, which provides flexibility in switching design. Moreover, this topology can be extended to infinite number of levels to meet the required standard for the output waveform. However, one of the defining shortcomings of this technology is the significant need for separate voltage sources to power the cells (Wu and Narimani, 2017a; Shehu et al., 2016). A five-level CHB inverter is shown in Figure 2 with its switching pattern in Table 3. It consists of two H-bridge cells per phase.

2.2 Single DC source

As per above map, single DC supply MLIs is divided as follows.

2.2.1 Neutral point clamped (NPC-MLI)

Single voltage source is utilized in neutral point clamped MLIs and is split into several capacitors linked in series according to the appropriate number of voltage levels. We shall divide the source into x1 capacitors that are linked to the source in series to get x levels. Figure 3 presents three-level NPC-MLI where the neutral point between the two feeding capacitors (i.e. point z) can be accessed through two clamping diodes. It is most suitable for high-power MV drives with advantages such as the reduced dv/dt and THD for the resultant waveform and, also, the applied voltage is equal on all switching devices in the commutation mode, whereas the drawbacks consider additional clamping diodes for high order of levels, asymmetrical power losses in the switching devices and the necessity of control loop for neutral point voltage deviation (Rana et al., 2019; Nordvall, 2011; Abd Halim et al., 2016; Wu, 2006; Young et al., 2012). Switching pattern is illustrated in Table 4.

2.2.2 Active neutral point clamped MLI (ANPC)

This kind of frequency inverter was developed to address one of the drawbacks of the NPC, namely the uneven distribution of losses in the switches, which results in an insufficient distribution of heat inside them. Switches 5 and 6 in Figure 4, for example, control and balance the loads on the switches. However, the entire converter system becomes more expensive and complicated when active clamping switches are used. Table 5 indicates the switching pattern for the three voltage levels.

2.2.3 Neutral point piloted MLI (NPP)

Bidirectional switches are added between the inverter output terminals and the dc bus neutral point to create the NPP inverter topology, which is evolved from the two-level inverter. As a result, the dv/dt and THD of the three-level voltage waveforms produced by this inverter are minimized. But there are certain restrictions with the NPP inverter where each switch position on the inverter requires a series connection of two or more switches depending on the potential rating. This questions the reliability and complexity of the system. Figure 5 shows three-level NPP inverter, and Table 6 indicates its switching states (Orfanoudakis et al., 2010; Wu and Narimani, 2017b; Guennegues et al., 2009).

2.2.4 Flying-capacitor MLI (FLC-MLI)

Figure 6 displays a 5L-FLC arrangement. This inverter is a two-level inverter with cascaded dc capacitors. Each inverter leg contains three flying capacitors with voltage ratings of 3E, 2E and E (E=Vd/4). Inverter legs have four switch pairs. Four gate signals are needed for an inverter leg's eight switches. The main features considered are the modular structure of the switches as well as reduced THD and dv/dt. However, this topology requires numerous dc capacitors equipped with precharging circuits and, also, inverter operating conditions affect flying capacitor voltages. To minimize dc voltage deviation concerns, flying capacitor voltages must be precisely regulated, increasing control system complexity. Because of the aforesaid disadvantages, flying-capacitor inverter's practical usage in MV drives is restricted. However, this inverter topology may be utilized to derive sophisticated converter topologies. Table 7 explains the switching pattern for 5L-FLC inverter (Rana et al., 2019; Nordvall, 2011; Akagi, 2019; Shehu et al., 2016; Wu and Narimani, 2017b; El-Hosainy et al., 2017).

Table 8 presents the comparison of consolidated features of the different MLI topologies discussed in this paper (Suresh, 2016; Hoon et al., 2017; Lai and Peng, 1996; Meynard and Foch, 1992; Rodrí et al., 2007; Debnath et al., 2022; Dyanamina and Kumar Kakodia, 2021).

3. Simulation results

A model system integrated using detailed circuit simulations in MATLAB®–Simulink program. In this system, a constant voltage source connected to MLI was used to feed Asynchronous motor with squirrel cage rotor type as shown in Figure 7.

Speed reference was applied on the motor with step changes. Also, the values of the reference torque were stepped up from no load to the maximum torque, and this allows to examine the MLI under various conditions and to verify the response of the motor currents. Figure 8, illustrates the speed and torque reference values for this model.

Figure 9 shows the source voltage response along with the motor three phase currents, speed and torque. It is observed that when the speed is increased, the motor draws larger instantaneous currents, which is reflected in the MLI.

4. Conclusion

With the innovation and growth of industrial sectors on a global and local scale, the need for high-energy converters continues to rise. Increase in significance and demand of MLIs for both low- and high-power applications are observed. This article describes and presents five types of MLI topologies (Rodrí et al., 2007). It is suggested that the MLIs like cascade-five-level and NPC-five-level have shown low current harmonics of around 0.43% and 1.87%, respectively, than two-level inverter showing 5.82%. In order to reduce the number of power switches in multilayer inverters, it is possible to reduce or rearrange the DC input voltages, according to the assessment. Other than that numerous academicians have presented specific topological explanations and resolutions in consideration of the desired use.

Figures

Classification of multilevel inverters

Figure 1

Classification of multilevel inverters

5-Level cascaded H-bridge inverter

Figure 2

5-Level cascaded H-bridge inverter

Three-level multilevel DC-MLI

Figure 3

Three-level multilevel DC-MLI

Active neutral point clamped MLI

Figure 4

Active neutral point clamped MLI

Neutral point piloted MLI

Figure 5

Neutral point piloted MLI

5-Level flying-capacitor MLI

Figure 6

5-Level flying-capacitor MLI

Simulink model of multilevel inverter to feed squirrel cage induction motor

Figure 7

Simulink model of multilevel inverter to feed squirrel cage induction motor

(a) Speed reference and (b) torque references for the IM

Figure 8

(a) Speed reference and (b) torque references for the IM

(a) Actual speed, (b) actual torque, (c) three-phase motor currents and (d) DC source performance

Figure 9

(a) Actual speed, (b) actual torque, (c) three-phase motor currents and (d) DC source performance

Comparison of two-level inverter and multilevel inverter

S. No.Two-level inverterMultilevel inverter
1Output waveform contains higher THDLow THD in the output waveform
2Larger switching stressLow switching stress
3It has limitation with high voltage applicationsCan be used for high voltage applications
4Cannot produce high voltagesIt can produce high voltage levels
5Larger dv/dtLow dv/dt
6Increased switching losses due to higher switching frequencyReduced switching losses because of lower switching frequency

Source(s): Table courtesy of Suresh (2016)

THD value for the two-level, cascaded five-level, and NPC-five-level inverter

TopologyTwo-levelCascaded five-levelNPC-five-level
Voltage THD% @ 1kHZ114.9529.6531.57
Current THD% @ 1kHZ5.820.431.87

Source(s): Table courtesy of Nordvall (2011)

Five-level CHB inverter switching states

Output voltage VANSwitching stateVH1VH2
S11S31S12S32
2E1010EE
E1011E0
1000E0
11100E
00100E
0000000
001100
110000
111100
1001E−E
0110−EE
−E0111−E0
0100−E0
11010−E
00010−E
−2E0101−E−E

Source(s): Table courtesy of Elbarbary

Switching states of DC-MLI

Switching stateDevice switching status (phase A)Inverter terminal voltage VAZ
S1S2S3S4
POnOnOffOffE
OOffOnOnOff0
NOffOffOnOnE

Source(s): Table courtesy of Rana et al. (2019)

Switching states for active neutral point clamped MLI

Switching stateSwitching states (phase A)Inverter voltage VAZ
S1S2S3S4S5S6
P110001E
OOU10100100
OU2010110
OL1001001
OL2101001
N001110−E

Source(s): Table courtesy of El-Hosainy et al. (2017)

Switching states for NPP-MLI

Switching stateSwitching state (phase A)Inverter phase Voltage VAZ
S1S2S3S4
[P]1010E
[O]00110
[N]0101−E

Source(s): Table courtesy of Orfanoudakis et al. (2010)

Switching states for 5L-multilevel FLC inverter

Switching state (phase A)Inverter phase voltage VAZ
S1S2S3S4
11112E
1110E
0111
1011
1101
11000
0011
1001
0110
1010
0101
1000−E
0100
0010
0001
0000−2E

Source(s): Table courtesy of Rana et al. (2019)

Comparison of features of different multilevel inverter topologies

S. No.TopologyNeutral point diode clampedFlying capacitorCascaded H-bridge
1DC link Capacitors(n1)(n1)3(n1)/2
2Switches with freewheeling diodes6(n1)6(n1)6(n1)
3Clamping Diodes3(n1)(n2)00
4Clamping Capacitors03(n1)(n2)/20
5Voltage UnbalancingAverageHighVery Small
6Advantagessturdy design and uses the least quantity of DC-link capacitors necessary (less voltage imbalance problems)Voltage balancing of DC-link capacitors can be accomplished using phase redundancyDue to its modularity, it has an easy structure and control
7DisadvantagesIncreased number of clamping diodes with the increasing number of levelsBulky size and more costly with more complex voltage balancing control algorithmsRequires multiple separate DC sources
8ApplicationsMotor Drive System, STATCOMMotor Drive System, STATCOMMotor Drive System, PV, Fuel cells, Battery system

Source(s): Table courtesy of Hoon et al. (2017)

References

Abd Halim, W., Ganeson, S., Azri, M. and Azam, T.T. (2016), “Review of multilevel inverter topologies and its applications”, Electronic and Computer Engineering, Vol. 8 No. 7, pp. 51-56.

Akagi, H. (2019), “Multilevel converters–configuration of CirCuits and systeMs”, Power Electronics in Renewable Energy Systems and Smart Grid: Technology and Applications, pp. 153-218.

Balal, A., Dinkhah, S., Shahabi, F., Herrera, M. and Chuang, Y.L. (2022), “A review on multilevel inverter topologies”, Emerging Science Journal, Vol. 6 No. 1, pp. 185-200.

Debnath, T., Gopakumar, K. and Umanand, L. (2022), “DC-Link capacitors voltage control using a multi-phase induction motor load driven by a multilevel inverter”, IECON 2022-48th Annual Conference of the IEEE Industrial Electronics Society, IEEE Xplore, 2236294.

Dyanamina, G. and Kumar Kakodia, S. (2021), “Adaptive neuro fuzzy inference system based decoupled control for neutral point clamped multi level inverter fed induction motor drive”, Chinese Journal of Electrical Engineering, IEEE, Vol. 7 No. 2, pp. 70-82.

El-Hosainy, A., Hamed, H.A., Azazi, H.Z. and El-Kholy, E. (2017), “A review of multilevel inverter topologies, control techniques, and applications”, 2017 Nineteenth International Middle East Power Systems Conference (MEPCON), IEEE, pp. 1265-1275.

Guennegues, V., Gollentz, B., Meibody-Tabar, F., Raël, S. and Leclere, L. (2009), “A converter topology for high speed motor drive applications”, 2009 13th European Conference on Power Electronics and Applications, IEEE, pp. 1-8.

Hoon, Y., Mohd Radzi, M.A., Hassan, M.K. and Mailah, N.F.J.E. (2017), “Control algorithms of shunt active power filter for harmonics mitigation”, A Review, Vol. 10 No. 12, p. 2038.

Lai, J.-S. and Peng, F.Z. (1996), “Multilevel converters-a new breed of power converters”, IEEE Transactions on Industry Applications, Vol. 32 No. 3, pp. 509-517.

Meynard, T.A. and Foch, H. (1992), “Multi-level conversion: high voltage choppers and voltage-source inverters”, PESC'92 Record. 23rd Annual IEEE Power Electronics Specialists Conference, IEEE, pp. 397-403.

Najafi, E. and Yatim, A.H.M. (2011), “Design and implementation of a new multilevel inverter topology”, IEEE Transactions on Industrial Electronics, Vol. 59 No. 11, pp. 4148-4154.

Nordvall, A. (2011), “Multilevel inverter topology survey”, Master of Science Thesis in Electric Power Engineering, Department of Energy and Environment Division of Electric Power Engineering Chalmers University of Technology Göteborg.

Orfanoudakis, G., Sharkh, S., Yuratich, M. and Abusara, M. (2010), “Loss comparison of two and three-level inverter topologies”, 5th IET International Conference on Power Electronics, Machines and Drives (PEMD 2010), IET, pp. 1-6.

Rahman, M.A. and Saleh, S. (2011), An Introduction to Wavelet Modulated Inverters, John Wiley & Sons.

Rana, R.A., Patel, S.A., Muthusamy, A., Lee, C.W. and Kim, H.-J. (2019), “Review of multilevel voltage source inverter topologies and analysis of harmonics distortions in FC-MLI”, Electronics, Vol. 8 No. 11, p. 1329.

Rodríguez, J., Bernet, S., Wu, B., Pontt, J.O. and Kouro, S. (2007), “Multilevel voltage-source-converter topologies for industrial medium-voltage drives”, IEEE Transactions on Industrial Electronics, Vol. 54 No. 6, pp. 2930-2945.

Saleh, S. and Rahman, M.A. (2011), Introduction to Power Inverters, Wiley Online Library. doi: 10.1002/9780470647998.ch1.

Shehu, G.S., Kunya, A.B., Shanono, I.H. and Yalçınöz, T. (2016), “A review of multilevel inverter topology and control techniques”.

Suresh, L.P. (2016), “A brief review on multilevel inverter topologies”, 2016 International Conference on Circuit, Power and Computing Technologies (ICCPCT), IEEE, pp. 1-6.

Wu, C. (2006), “DiodeClamped multilevel inverters”, Wiley-IEEE Press, pp. 143-177, doi: 10.1002/9780471773719.ch8.

Wu, B. and Narimani, M. (2017a), High-power Converters and AC Drives, John Wiley & Sons.

Wu, B. and Narimani, M. (2017b), Other Multilevel Voltage Source Inverters, 2nd ed., Wiley-IEEE Press, pp. 185-223, doi: 10.1002/9781119156079.ch9.

Young, C.-M., Chu, N.-Y., Chen, L.-R., Hsiao, Y.-C. and Li, C.-Z (2012), “A single-phase multilevel inverter with battery balancing”, IEEE Transactions on Industrial Electronics, Vol. 60 No. 5, pp. 1972-1978.

Corresponding author

Z.M.S. Elbarbary can be contacted at: albrbry@kku.edu.sa

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