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Article
Publication date: 1 January 2013

Javier Pereda and Juan Dixon

The aim of this paper is to improve and adapt cascaded multilevel converters for electric vehicles (EVs) to have all the advantages of these converters and to eliminate its…

Abstract

Purpose

The aim of this paper is to improve and adapt cascaded multilevel converters for electric vehicles (EVs) to have all the advantages of these converters and to eliminate its limitation in the use of EVs applications. Specifically, the purpose is to use only a single power source (battery pack, fuel cell, etc.) and to generate a higher power‐quality than regular multilevel converters.

Design/methodology/approach

This paper is based in a cascaded multilevel converter conformed by two 3‐level inverters connected in series. The voltage sources of the auxiliary inverter were replaced by floating capacitors which work as active filters, reducing the power sources to one. The floating capacitor voltages were controlled by a PI controller that adjusts the modulation index (m) to obtain a zero average power in the auxiliary inverters, and a predictive control selects the optimal redundant state to reduce the error and balance all the capacitor voltages. As the modulation index is determined by the PI controller, the output voltage magnitude must be controlled by a variable voltage source (e.g. buck‐boost chopper). Additionally, the converter works with new optimal voltage asymmetries to obtain higher power quality and capacitor control stability.

Findings

The proposed converter uses a topology that conventionally generates 9‐levels of voltage, but with the proposed asymmetry is as generate 11‐levels. Also, the auxiliary power sources were eliminated.

Research limitations/implications

The proposed solution has a limited dynamic response due to the variation rate of the capacitor voltage, which is limited by the load current and the capacitance. However, the dynamic response and control stability is satisfactory for EVs applications.

Originality/value

The paper presents a new control to manage the floating capacitor voltages and uses new voltage asymmetries in cascaded multilevel converters.

Details

COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, vol. 32 no. 1
Type: Research Article
ISSN: 0332-1649

Keywords

Article
Publication date: 8 June 2022

Chinnaraj Gnanavel and Kumarasamy Vanchinathan

These implementations not only generate excessive voltage levels to enhance the quality of power but also include a detailed investigating of the various modulation methods and…

Abstract

Purpose

These implementations not only generate excessive voltage levels to enhance the quality of power but also include a detailed investigating of the various modulation methods and control schemes for multilevel inverter (MLI) topologies. Reduced harmonic modulation technology is used to produce 11-level output voltage with the production of renewable energy applications. The simulation is done in the MATLAB/Simulink for 11-level symmetric MLI and is correlated with the conventional inverter design.

Design/methodology/approach

This paper is focused on investigating the different types of asymmetric, symmetric and hybrid topologies and control methods used for the modular multilevel inverter (MMI) operation. Classical MLI configurations are affected by performance issues such as poor power quality, uneconomic structure and low efficiency.

Findings

The variations in both carrier and reference signals and their performance are analyzed for the proposed inverter topologies. The simulation result compares unipolar and bipolar pulse-width modulation (PWM) techniques with total harmonic distortion (THD) results. The solar-fed 11-level MMI is controlled using various modulation strategies, which are connected to marine emergency lighting loads. Various modulation techniques are used to control the solar-fed 11-level MMI, which is connected to marine emergency lighting loads. The entire hardware system is controlled by using SPARTAN 3A field programmable gate array (FPGA) board and the least harmonics are obtained by improving the power quality.

Originality/value

The simulation result compares unipolar and bipolar PWM techniques with THD results. Various modulation techniques are used to control the solar-fed 11-level MMI, which is connected to marine emergency lighting loads. The entire hardware system is controlled by a SPARTAN 3A field programmable gate array (FPGA) board, and the power quality is improved to achieve the lowest harmonics possible.

Details

Circuit World, vol. 49 no. 4
Type: Research Article
ISSN: 0305-6120

Keywords

Article
Publication date: 28 February 2022

Jayarama Pradeep, Krishnakumar Vengadakrishnan, Anbarasan Palani and Thamizharasan Sandirasegarane

Multilevel inverters become very popular in medium voltage applications owing to their inherent capability of reconciling stepped voltage waveform with reduced harmonic distortion…

Abstract

Purpose

Multilevel inverters become very popular in medium voltage applications owing to their inherent capability of reconciling stepped voltage waveform with reduced harmonic distortion and electromagnetic interference. They have several disadvantages like more number of switching devices required and devices with high voltage blocking and need additional dc sources count to engender particular voltage. So this paper aims to propose a novel tri-source symmetric cascaded multilevel inverter topology with reduced number of switching components and dc sources.

Design/methodology/approach

A novel multilevel inverter has been suggested in this study, offering minimal switch count in the conduction channel for the desired voltage level under symmetric and asymmetric configurations. This novel topology is optimized to prompt enormous output voltage levels by employing constant power switches count and/or dc sources of voltage. The topology claims its advantages in generating higher voltage levels with lesser number of voltage sources, gate drivers and dc voltage sources.

Findings

The consummation of the proposed arrangement is verified in Matlab/Simulink R2015b, and an experimental prototype for 7-level, 13-level, 21-level, 29-level, 25-level and 49-level operation modes is constructed to validate the simulation results.

Originality/value

The proposed topology operated with six new algorithms for asymmetrical configuration to propel increased number of voltage levels with reduced power components.

Details

Circuit World, vol. 49 no. 4
Type: Research Article
ISSN: 0305-6120

Keywords

Article
Publication date: 8 May 2018

Henda Jabberi and Faouzi Ben Ammar

To improve the voltage quality in AC adjustable high-power-speed-drive applications, the purpose of the paper is to provide a large number of output levels without increasing the…

Abstract

Purpose

To improve the voltage quality in AC adjustable high-power-speed-drive applications, the purpose of the paper is to provide a large number of output levels without increasing the number of commutation cells in the three-phase, n-cells flying capacitor voltage source asymmetric Multilevel Inverter (MI). The concept is based on the selection of different ratios between the breakdown voltages of two successive power devices. The new mathematical model is developed under various ratios, allows a thorough investigation of the harmonic distortions, flying capacitor energy storage, flying capacitor voltage balancing controllability and blocking voltage insulated gate bipolar transistor (IGBT) capability.

Design/methodology/approach

The asymmetrical design provides a large number of output levels without increasing the number of commutation cells. The important new analytical expression of capacitors voltage distribution is derived and extended to any ratio between the switch breakdown voltages of two successive power devices.

Findings

The detailed simulation study of the proposed concept has been carried out using MATLAB/Simulink. The power switches control of the three-phase three-cell MI is assured by new phase-shifted-multi-carrier pulse width modulation. The space vector representation is used to show the regular and irregular step output voltage in the complex plan (α,β).

Originality/value

In the paper, the n cells flying capacitor inverter, which typically operates in the (n + 1) levels mode, was extended to (n + 2), (n + 3) … until 2n levels with regular or irregular step output voltage. Consequently, the claimed advantages of the asymmetric MI are to improve power quality by reducing harmonic distortions and to reduce the requirement on capacitive energy storage in the circuit.

Details

COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, vol. 37 no. 3
Type: Research Article
ISSN: 0332-1649

Keywords

Article
Publication date: 17 August 2021

Saeed Alizadeh, Mohammad Farhadi-Kangarlu and Behrouz Tousi

Multilevel inverters (MLIs) have been studied widely over the past two decades because of their inherent advantages and interesting features. However, most of the newly introduced…

Abstract

Purpose

Multilevel inverters (MLIs) have been studied widely over the past two decades because of their inherent advantages and interesting features. However, most of the newly introduced structures suffer from the increased standing voltage of the switches, which is defined as the maximum off-state voltage on the switches, losing modularity and increased number of direct current (DC) voltage sources. The purpose of this study is to propose a new hybrid MLI topology to alleviate the mentioned problems.

Design/methodology/approach

The proposed approach in this study includes using the advantage of two different topologies and combine them in a way that the advantages of both of the topologies are achieved. Therefore, the approach is to design a hybrid topology from two existing topologies so that a new topology has resulted.

Findings

This paper proposes a new hybrid MLI with lower power electronic switches and lowers DC voltage sources in comparison with the classic structures. The proposed MLIs maintain a balance between the number of switches, the standing voltage on the switches and the number of DC sources. The topology description, modulation method and comparative study have been presented. Also, another more reduced structure is presented for higher power factor operation. The MATLAB simulation and experimental results of a nine-level inverter have been presented to verify its operation.

Originality/value

The hybrid topology has a new structure that has not been presented before. It is important to emphasize that the topology combination and achieving the hybrid topology is wisely accomplished to improve some features of the MLI.

Details

Circuit World, vol. 49 no. 2
Type: Research Article
ISSN: 0305-6120

Keywords

Article
Publication date: 8 July 2020

Anbarasan P., Krishnakumar V., Ramkumar S. and Venkatesan S.

This paper aims to propose a new MLI topology with reduced number of switches for photovoltaic applications. Multilevel inverters (MLIs) have been found to be prospective for…

173

Abstract

Purpose

This paper aims to propose a new MLI topology with reduced number of switches for photovoltaic applications. Multilevel inverters (MLIs) have been found to be prospective for renewable energy applications like photovoltaic cell, as they produce output voltage from numerous separate DC sources or capacitor banks with reduced total harmonic distortion (THD) because of a staircase like waveform. However, they endure from serious setbacks including larger number of capacitors, isolated DC sources, associated gate drivers and increased control difficulty for higher number of voltage levels.

Design/methodology/approach

This paper proposes a new three-phase multilevel DC-link inverter topology overpowering the previously mentioned problems. The proposed topology is designed for five and seven levels in Matlab/Simulink with gating pulse using multicarrier pulse width modulation. The hardware results are shown for a five-level MLI to witness the viability of the proposed MLI for medium voltage applications.

Findings

The comparison of the proposed topology with other conventional and other topologies in terms of switch count, DC sources and power loss has been made in this paper. The reduction of switches in proposed topology results in reduced power loss. The simulation and hardware show that the output voltage yields a very close sinusoidal voltage and lesser THD.

Originality/value

The proposed topology can be extended for any level of output voltage which is helpful for sustainable source application.

Details

Circuit World, vol. 47 no. 2
Type: Research Article
ISSN: 0305-6120

Keywords

Article
Publication date: 12 February 2020

Kaladhar Gaddala and P. Sangameswara Raju

In general, the optimal reactive power compensation could drastically enhance the performance of distributed network by the reduction of power loss and by enhancement of line…

Abstract

Purpose

In general, the optimal reactive power compensation could drastically enhance the performance of distributed network by the reduction of power loss and by enhancement of line loadability and voltage profile. Till now, there exist various reactive power compensation models including capacitor placement, joined process of on-load tap changer and capacitor banks and integration of DG. Further, one of the current method is the allocation of distribution FACTS (DFACTS) device. Even though, the DFACTS devices are usually used in the enhancement of power quality, they could be used in the optimal reactive power compensation with more effectiveness.

Design/methodology/approach

This paper introduces a power quality enhancement model that is based on a new hybrid optimization algorithm for selecting the precise unified power quality conditioner (UPQC) location and sizing. A new algorithm rider optimization algorithm (ROA)-modified particle swarm optimization (PSO) in fitness basis (RMPF) is introduced for this optimal selections.

Findings

Through the performance analysis, it is observed that as the iteration increases, there is a gradual minimization of cost function. At the 40th iteration, the proposed method is 1.99 per cent better than ROA and genetic algorithm (GA); 0.09 per cent better than GMDA and WOA; and 0.14, 0.57 and 1.94 per cent better than Dragonfly algorithm (DA), worst solution linked whale optimization (WS-WU) and PSO, respectively. At the 60th iteration, the proposed method attains less cost function, which is 2.07, 0.08, 0.06, 0.09, 0.07 and 1.90 per cent superior to ROA, GMDA, DA, GA, WS-WU and PSO, respectively. Thus, the proposed model proves that it is better than other models.

Originality/value

This paper presents a technique for optimal placing and sizing of UPQC. To the best of the authors’ knowledge, this is the first work that introduces RMPF algorithm to solve the optimization problems.

Details

Journal of Engineering, Design and Technology , vol. 18 no. 6
Type: Research Article
ISSN: 1726-0531

Keywords

Article
Publication date: 8 March 2011

Arash Abbasalizadeh Boora, Firuz Zare and Arindam Ghosh

Multi‐level diode‐clamped inverters have the challenge of capacitor voltage balancing when the number of DC‐link capacitors is three or more. On the other hand, asymmetrical

Abstract

Purpose

Multi‐level diode‐clamped inverters have the challenge of capacitor voltage balancing when the number of DC‐link capacitors is three or more. On the other hand, asymmetrical DC‐link voltage sources have been applied to increase the number of voltage levels without increasing the number of switches. The purpose of this paper is to show that an appropriate multi‐output DC‐DC converter can resolve the problem of capacitor voltage balancing and utilize the asymmetrical DC‐link voltages advantages.

Design/methodology/approach

A family of multi‐output DC‐DC converters is presented in this paper. The application of these converters is to convert the output voltage of a photovoltaic (PV) panel to regulate DC‐link voltages of an asymmetrical four‐level diode‐clamped inverter utilized for domestic applications. To verify the versatility of the presented topology, simulations have been directed for different situations and results are presented. Some related experiments have been developed to examine the capabilities of the proposed converters.

Findings

The three‐output voltage‐sharing converters presented in this paper have been mathematically analysed and proven to be appropriate to improve the quality of the residential application of PV by means of four‐level asymmetrical diode‐clamped inverter supplying highly resistive loads.

Originality/value

This paper shows that an appropriate multi‐output DC‐DC converter can resolve the problem of capacitor voltage balancing and utilize the asymmetrical DC‐link voltages advantages and that there is a possibility of operation at high‐modulation index despite reference voltage magnitude and power factor variations.

Details

COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, vol. 30 no. 2
Type: Research Article
ISSN: 0332-1649

Keywords

Article
Publication date: 5 January 2015

Hernaldo Saldías Molina, Juan Dixon Rojas and Luis Morán Tamayo

The purpose of this paper is to implement a finite set model predictive control algorithm to a shunt (or parallel), multilevel (cascaded H-bridge) active power filter (APF)…

Abstract

Purpose

The purpose of this paper is to implement a finite set model predictive control algorithm to a shunt (or parallel), multilevel (cascaded H-bridge) active power filter (APF). Specifically, the purpose is to get a controller that could compensate the mains current and, at the same time, to control the voltages of its capacitors. This strategy avoids the use of multiple PWM carriers or another type of special modulator, and requires a relatively low processing power.

Design/methodology/approach

This paper is focussed in the application of the predictive controller to a single-phase parallel APF composed for two H-bridges connected in series. The same methodology can be applied to a three-phase APF. In the DC buses of each H-bridge, a floating capacitor was connected, whose voltage is regulated by the predictive controller. The controller is composed by, first, a model for the charge/discharge dynamics for each floating capacitor and a model for the output current of the APF; second, a cost function; and third, an optimization algorithm that is able to control all these variables at the same time, choosing in each sample period the best combination of firing pulses.

Findings

The controller can track the voltage references, compensate the current harmonics and compensate reactive power with an algorithm that evaluates only the three nearest voltage levels to the last voltage level applied in the inverter. This strategy decreases the number of calculations required by the predictive algorithm. This controller can be applied to the general case of a single-phase multilevel APF of N-levels and extend it to the three-phase case without major problems.

Research limitations/implications

The implemented controller, when the authors consider a constant sample time, gives a mains current with a Total Harmonic Distortion (THD-I) slightly greater in comparison with the base algorithm (that evaluates all the voltage levels). However, when the authors consider the processing times under the same processor, the implemented algorithm requires less time to get the optimal values, can get lower sampling times and then a best performance in terms of THD-I. To implement the controller in a three-phase APF, a faster Digital Signal Processor would be required.

Originality/value

The implemented solution uses a model for the charge/discharge of the capacitors and for the filter current that enable to operate the cascaded multilevel inverter with asymmetrical voltages while compensates the mains currents, with a predictive algorithm that requires a relatively low amount of calculations.

Details

COMPEL: The International Journal for Computation and Mathematics in Electrical and Electronic Engineering, vol. 34 no. 1
Type: Research Article
ISSN: 0332-1649

Keywords

Article
Publication date: 2 November 2015

Diego Iannuzzi, Mario Pagano, Luigi Piegari and Pietro Tricoli

The purpose of this paper is to propose a new converter topology for integrating PV plants constituted by many panels into the grid. The converter is capable of implementing MPPT…

Abstract

Purpose

The purpose of this paper is to propose a new converter topology for integrating PV plants constituted by many panels into the grid. The converter is capable of implementing MPPT algorithms on different subset of modules and can balance the different energy supplied by panels differently irradiated. The output voltage presents a very low ripple also if small filters are used for grid connection.

Design/methodology/approach

In the paper, at first the converter configuration is presented. Then a control strategy for obtaining, at the same time the distributed MPPT and the power balancing on the three phases is proposed. Finally, by means of numerical simulations, the good performances of the proposed converter are shown.

Findings

The proposed converter, lent from MMC configurations, is deeply studied and a suitable control strategy is well analyzed in the paper. Analytical model for voltage and current balancing are given.

Research limitations/implications

The analysis presented in the paper complete some studies started in the last years and partially presented in previous scientific papers. It reaches a final point and gives all the specific for the realization of the converter and of its control.

Practical implications

The paper gives all the instrument to design and realize a PV power plant integrated into building façade.

Originality/value

The converter and the control for voltage and current balancing presented in this paper represent a significant original contribution of this work.

Details

COMPEL: The International Journal for Computation and Mathematics in Electrical and Electronic Engineering, vol. 34 no. 6
Type: Research Article
ISSN: 0332-1649

Keywords

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