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The aim of this paper is to improve and adapt cascaded multilevel converters for electric vehicles (EVs) to have all the advantages of these converters and to eliminate its limitation in the use of EVs applications. Specifically, the purpose is to use only a single power source (battery pack, fuel cell, etc.) and to generate a higher power‐quality than regular multilevel converters.

This paper is based in a cascaded multilevel converter conformed by two 3‐level inverters connected in series. The voltage sources of the auxiliary inverter were replaced by floating capacitors which work as active filters, reducing the power sources to one. The floating capacitor voltages were controlled by a PI controller that adjusts the modulation index (m) to obtain a zero average power in the auxiliary inverters, and a predictive control selects the optimal redundant state to reduce the error and balance all the capacitor voltages. As the modulation index is determined by the PI controller, the output voltage magnitude must be controlled by a variable voltage source (e.g. buck‐boost chopper). Additionally, the converter works with new optimal voltage asymmetries to obtain higher power quality and capacitor control stability.

The proposed converter uses a topology that conventionally generates 9‐levels of voltage, but with the proposed asymmetry is as generate 11‐levels. Also, the auxiliary power sources were eliminated.

The proposed solution has a limited dynamic response due to the variation rate of the capacitor voltage, which is limited by the load current and the capacitance. However, the dynamic response and control stability is satisfactory for EVs applications.

The paper presents a new control to manage the floating capacitor voltages and uses new voltage asymmetries in cascaded multilevel converters.

The purpose of this paper is to implement a finite set model predictive control algorithm to a shunt (or parallel), multilevel (cascaded H-bridge) active power filter (APF). Specifically, the purpose is to get a controller that could compensate the mains current and, at the same time, to control the voltages of its capacitors. This strategy avoids the use of multiple PWM carriers or another type of special modulator, and requires a relatively low processing power.

This paper is focussed in the application of the predictive controller to a single-phase parallel APF composed for two H-bridges connected in series. The same methodology can be applied to a three-phase APF. In the DC buses of each H-bridge, a floating capacitor was connected, whose voltage is regulated by the predictive controller. The controller is composed by, first, a model for the charge/discharge dynamics for each floating capacitor and a model for the output current of the APF; second, a cost function; and third, an optimization algorithm that is able to control all these variables at the same time, choosing in each sample period the best combination of firing pulses.

The controller can track the voltage references, compensate the current harmonics and compensate reactive power with an algorithm that evaluates only the three nearest voltage levels to the last voltage level applied in the inverter. This strategy decreases the number of calculations required by the predictive algorithm. This controller can be applied to the general case of a single-phase multilevel APF of N-levels and extend it to the three-phase case without major problems.

The implemented controller, when the authors consider a constant sample time, gives a mains current with a Total Harmonic Distortion (THD-I) slightly greater in comparison with the base algorithm (that evaluates all the voltage levels). However, when the authors consider the processing times under the same processor, the implemented algorithm requires less time to get the optimal values, can get lower sampling times and then a best performance in terms of THD-I. To implement the controller in a three-phase APF, a faster Digital Signal Processor would be required.

The implemented solution uses a model for the charge/discharge of the capacitors and for the filter current that enable to operate the cascaded multilevel inverter with asymmetrical voltages while compensates the mains currents, with a predictive algorithm that requires a relatively low amount of calculations.

The purpose of this paper rapid development of various voltage sag compensation techniques in DC bus using ultra-capacitors (UCs) provides satisfactory results when compared with required peak power demand for shorter duration. Later, UCs have been used as floating capacitors [1] [2]. Various UCs are available based on internal resistances which also rely on its manufacturing materials, similar to double layer capacitors.

This paper demonstrates UCs based voltage sag compensation at load side under different working modes of hydraulic pack (HP) in an armored fighting vehicle (AFV). The main sources to supply the HP are 24 V, 400 Ahr battery bank and 20 kW main generator. HP is considered to be the highest power load of a system. 2,500 A inrush current was drawn by HP during initial conditions, and also, this system works in both elevation and azimuth mode. Voltage sag has been varied from 15 to 24 V for different modes. But as per the military standard, electrical systems should operate between 18 and 32 V DC. Because of insufficient terminal voltage, required energy cannot be attained and supplied to the loads. The proposed topology compensated the voltage sag and maintains nominal voltage on a DC bus. The devised circuit has been verified under all possible operating loads such as continuous, intermittent and momentary. The same has been simulated using MATLAB/Simulink and was experimentally verified. The minimum voltage maintained in a DC bus is 22.2 V in simulation, while experimentally, it was 24.2 V.

For getting higher percentage of efficiency, secondary energy system configuration, mainly designed for electrical vehicles, is needed. It was implemented and same was tested with the fighting vehicle system[1]. The proposed configuration comprises of bank of an UC and a battery bank. The system was finally implemented in AFVs.

The goods vehicles made of UCs can hold very minimum energy because of minimum density of energy. The modified AFV can have minimum charging as well as discharging of rate of energy and, thus, power[3][4]. Thus, the proposed idea of modified vehicle system has influence over significant change in the state of charge.

The purpose of this paper is to design and construct an amplitude shift keying (ASK) modulator, which, using the digital binary modulating signal, controls a floating memristor emulator (MR) internally without the need for additional control circuits to achieve the ASK modulated wave.

A binary digital unipolar signal to be modulated is converted by a pre-processor circuit into a suitable bipolar modulating direct current (DC) signal for the control of the MR state, using current conveyors the carrier signal’s amplitude is varied with the change in the memristance of the floating MR. A high pass filter is then used to remove the DC control signal (modulating signal) leaving only the modulated carrier signal.

The results from the experiment and simulation are in agreement showed that the MR can be switched between two states and that a change in the carrier signals amplitude can be achieved by using an MR. Thus, showing that the circuit behavior is in line with the proposed theory and validating the said theory.

In this paper, the binary signal to be modulated is modified into a suitable control signal for the MR, thus the MR relies on the internal operation of the modulator circuit for the control of its memristance. An ASK modulation can then be achieved using a floating memristor without the need for additional circuits or signals to control its memristance.

To improve the voltage quality in AC adjustable high-power-speed-drive applications, the purpose of the paper is to provide a large number of output levels without increasing the number of commutation cells in the three-phase, n-cells flying capacitor voltage source asymmetric Multilevel Inverter (MI). The concept is based on the selection of different ratios between the breakdown voltages of two successive power devices. The new mathematical model is developed under various ratios, allows a thorough investigation of the harmonic distortions, flying capacitor energy storage, flying capacitor voltage balancing controllability and blocking voltage insulated gate bipolar transistor (IGBT) capability.

The asymmetrical design provides a large number of output levels without increasing the number of commutation cells. The important new analytical expression of capacitors voltage distribution is derived and extended to any ratio between the switch breakdown voltages of two successive power devices.

The detailed simulation study of the proposed concept has been carried out using MATLAB/Simulink. The power switches control of the three-phase three-cell MI is assured by new phase-shifted-multi-carrier pulse width modulation. The space vector representation is used to show the regular and irregular step output voltage in the complex plan (α,β).

In the paper, the n cells flying capacitor inverter, which typically operates in the (n + 1) levels mode, was extended to (n + 2), (n + 3) … until 2ⁿ levels with regular or irregular step output voltage. Consequently, the claimed advantages of the asymmetric MI are to improve power quality by reducing harmonic distortions and to reduce the requirement on capacitive energy storage in the circuit.

Industrial drives require appropriate control systems for reliable and efficient performance. With synchronous reluctance machines (SynRMs) slowly replacing the most commonly used induction, switched reluctance and permanent magnet machines, it is essential that the drive and its control be properly selected for enhanced performance. But the major drawback of synchronous reluctance motor is the presence of high torque ripple as its design is characterized by large number of variables. The solutions to reduce torque ripple include design modifications, choice of proper power electronic inverter and PWM strategy. But little has been explored about the power electronic inverters suited for synchronous reluctance motor drive to minimize torque ripple inherently by obtaining a more sinusoidal voltage. The purpose of this paper is to elaborate on the potential multilevel inverter topologies applicable to SynRM drives used in solar pumping applications.

The most significant field-oriented control using maximum torque per ampere algorithm for maximizing the torque production is used for the control of SynRM. Simulation results carried out using Matlab/Simulink are presented to justify the choice of inverter and its control technique for SynRM.

The five-level inverter drive gives lesser core or iron losses in the SynRMin comparison to the three- and two-level inverters due to lower Id current ripple. The five-level inverter reduces the torque ripple of the SynRM significantly in comparison to the three- and two-level inverter fed SynRM drives. The phase disposition-PWM control method used for the inverter shows the least total harmonic distortion (THD) levels in output voltage compared with the other level shifted PWM techniques.

Among the available topologies, a fitting topology is proposed for use for the SynRM drive to have minimal THD, minimal current and torque ripple. Additionally, this paper presents various modulation techniques available for the selected drive system and reports on a suitable technique based on minimal THD of output voltage and hence minimal torque ripple.

To develop an OTA‐C‐based universal filter realizing all standard transfer functions viz low pass, high pass, band pass, notch and all pass without an inverting amplifier and with minimum component matching condition.

By developing different sets of current and voltage relationship involving simple independent transconductance in biquadratic functions using three operational transconductance amplifiers the aim has been achieved.

The circuit produces all pass transfer function as stated above without inverting amplifier as has been used in most of the earlier circuits. All realizations except all pass filter requires no matching condition. The circuit remains stable for non‐ideal OTAs.

The proposed circuit finds wide utility in industrial and research applications as a signal processing element.

This paper aims to review comprehensively the different voltage-boosting techniques and classifies according to their voltage gain, stress on the semiconductor devices, count of the total components and their prominent features. Hence, the focus is on non-isolated step-up converters. The converters categorized are analyzed according to their category with graphical representation.

Many converters have been reported in recent years in the literature to meet our power requirements from mill watts to megawatts. Fast growth in the generation of renewable energy in the past few years has promoted the selection of suitable converters that directly impact the behaviour of renewable energy systems. Step-up converters are a fast-emerging switching power converter in various power supply units. Researchers are more attracted to the derivation of novel topology with a high voltage gain, low voltage and current stress, high efficiency, low cost, etc.

A comparative study is done on critical metrics such as voltage gain, switch voltage stress and component count. Besides, the converters are also summarized based on their advantages and disadvantages. Furthermore, the areas that need to be explored in this field are identified and presented.

Types of analysis usually performed in dc converter and their needs with the areas need to be focused are not yet completely reviewed in most of the articles. This paper gives an eyesight on these topics. This paper will guide the researchers to derive and suggest a suitable topology for the chosen application. Moreover, it can be used as a handbook for studying the various topologies with their shortfalls, which will provide a way for researchers to focus.

The purpose of this paper is to design a cascaded Multilevel inverter with reduce number of switches for high power applications. This paper came up with an innovative three-phase multilevel inverter (MLI) topology, which is a cascaded structure based on classical three-legged voltage source inverter (VSI) bridges as an individual module. The prominent advantage of this topology is that it requires only one direct current (DC) link system. The main characteristic of it is that a higher number of voltage levels can be achieved with considerably a smaller number of semiconductor switches, which improves the reliability, power quality, cost and size of the system significantly.

The individual modules are cascaded through three-phase transformers to provide higher voltage at the output with the higher number of voltage levels. In this work, the phase-shifted pulse width modulation technique is implemented to verify the result.

The proposed topology is compared with three-phase cascaded H-bridge MLI (CHB-MLI) and a modified CHB-MLI topology and found better in many aspects. The proposed MLI can produce a higher number of voltage levels with fewer semiconductor switches and associated triggering circuitry. As the device count in the proposed MLI is less compared to other MLI discussed, it tends to have less switching and conduction loss which increases the efficiency and reliability. As the number of level increases, the voltage profile and the total harmonic distortion of the proposed MLI improves.

This is a transformer-based modular cascaded MLI, which is based on classical VSI bridges. Here in this topology, a single module provides all three phases. So, a single string of cascaded modules is enough for three-phase multilevel voltage generation.

This paper introduces thermal‐stress analysis methods which follow electrical engineering procedures. The spring constant or c‐value is found to be related to the electrical impedance, combining dimensions and material characteristics in a performance parameter which simplifies calculations. Voltage is used to represent thermal deformation, and thermal forces are modelled as currents. Relationships equivalent to Ohm's Law are applied to calculate thermal stresses in leads or traces of surface‐mount assemblies. The thermal performance of laminates, e.g., thermal expansion coefficients of interconnect boards with a restraining core, and the thermal stresses in the bonded layers, are derived from the analysis of an electrical network which represents the composite structure. The method provides visual concepts which facilitate a first‐order solution of engineering problems related to thermal stress.