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Article
Publication date: 1 January 2013

Javier Pereda and Juan Dixon

The aim of this paper is to improve and adapt cascaded multilevel converters for electric vehicles (EVs) to have all the advantages of these converters and to eliminate its…

Abstract

Purpose

The aim of this paper is to improve and adapt cascaded multilevel converters for electric vehicles (EVs) to have all the advantages of these converters and to eliminate its limitation in the use of EVs applications. Specifically, the purpose is to use only a single power source (battery pack, fuel cell, etc.) and to generate a higher power‐quality than regular multilevel converters.

Design/methodology/approach

This paper is based in a cascaded multilevel converter conformed by two 3‐level inverters connected in series. The voltage sources of the auxiliary inverter were replaced by floating capacitors which work as active filters, reducing the power sources to one. The floating capacitor voltages were controlled by a PI controller that adjusts the modulation index (m) to obtain a zero average power in the auxiliary inverters, and a predictive control selects the optimal redundant state to reduce the error and balance all the capacitor voltages. As the modulation index is determined by the PI controller, the output voltage magnitude must be controlled by a variable voltage source (e.g. buck‐boost chopper). Additionally, the converter works with new optimal voltage asymmetries to obtain higher power quality and capacitor control stability.

Findings

The proposed converter uses a topology that conventionally generates 9‐levels of voltage, but with the proposed asymmetry is as generate 11‐levels. Also, the auxiliary power sources were eliminated.

Research limitations/implications

The proposed solution has a limited dynamic response due to the variation rate of the capacitor voltage, which is limited by the load current and the capacitance. However, the dynamic response and control stability is satisfactory for EVs applications.

Originality/value

The paper presents a new control to manage the floating capacitor voltages and uses new voltage asymmetries in cascaded multilevel converters.

Details

COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, vol. 32 no. 1
Type: Research Article
ISSN: 0332-1649

Keywords

Article
Publication date: 12 September 2008

Imen Jaafar, Faouzi Ben Ammar and Mohammed Elleuch

This paper aims to integrate cascaded multilevel converters in the static compensator (STATCOM) systems in order to assure dynamic compensation of the reactive power absorbed by…

Abstract

Purpose

This paper aims to integrate cascaded multilevel converters in the static compensator (STATCOM) systems in order to assure dynamic compensation of the reactive power absorbed by fixed speed wind turbines.

Design/methodology/approach

The cascaded multilevel converter topology is incorporated as a variable source of reactive power required by the wind farm. The evaluation of reference reactive currents is assured by the technique of instantaneous power theory. Thus, the STATCOM, with its appropriate control strategy, continuously compensates the reactive currents.

Findings

A developed non‐linear state representation makes possible the analysis of static and dynamic behaviour of the proposed system. The STATCOM‐based cascaded multilevel converter is able to provide continuous compensation and proves highly dynamic under steady state and transient operating conditions.

Practical implications

The paper formulates a mathematical model which includes all parameters describing the system composed by a medium voltage network, a wind farm and a STATCOM‐based cascaded multilevel converter. The study may help to develop new control methods of such power systems containing non‐linearities and an extended number of parameters.

Originality/value

Since there are few studies on comprehensive and complete models of power systems, the paper contributes to make both a study and a simulation based on a developed non‐linear state model which perfectly describes the state and transient behaviour of the proposed system.

Details

COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, vol. 27 no. 5
Type: Research Article
ISSN: 0332-1649

Keywords

Article
Publication date: 2 November 2015

Diego Iannuzzi, Mario Pagano, Luigi Piegari and Pietro Tricoli

The purpose of this paper is to propose a new converter topology for integrating PV plants constituted by many panels into the grid. The converter is capable of implementing MPPT…

Abstract

Purpose

The purpose of this paper is to propose a new converter topology for integrating PV plants constituted by many panels into the grid. The converter is capable of implementing MPPT algorithms on different subset of modules and can balance the different energy supplied by panels differently irradiated. The output voltage presents a very low ripple also if small filters are used for grid connection.

Design/methodology/approach

In the paper, at first the converter configuration is presented. Then a control strategy for obtaining, at the same time the distributed MPPT and the power balancing on the three phases is proposed. Finally, by means of numerical simulations, the good performances of the proposed converter are shown.

Findings

The proposed converter, lent from MMC configurations, is deeply studied and a suitable control strategy is well analyzed in the paper. Analytical model for voltage and current balancing are given.

Research limitations/implications

The analysis presented in the paper complete some studies started in the last years and partially presented in previous scientific papers. It reaches a final point and gives all the specific for the realization of the converter and of its control.

Practical implications

The paper gives all the instrument to design and realize a PV power plant integrated into building façade.

Originality/value

The converter and the control for voltage and current balancing presented in this paper represent a significant original contribution of this work.

Details

COMPEL: The International Journal for Computation and Mathematics in Electrical and Electronic Engineering, vol. 34 no. 6
Type: Research Article
ISSN: 0332-1649

Keywords

Article
Publication date: 8 June 2022

Chinnaraj Gnanavel and Kumarasamy Vanchinathan

These implementations not only generate excessive voltage levels to enhance the quality of power but also include a detailed investigating of the various modulation methods and…

Abstract

Purpose

These implementations not only generate excessive voltage levels to enhance the quality of power but also include a detailed investigating of the various modulation methods and control schemes for multilevel inverter (MLI) topologies. Reduced harmonic modulation technology is used to produce 11-level output voltage with the production of renewable energy applications. The simulation is done in the MATLAB/Simulink for 11-level symmetric MLI and is correlated with the conventional inverter design.

Design/methodology/approach

This paper is focused on investigating the different types of asymmetric, symmetric and hybrid topologies and control methods used for the modular multilevel inverter (MMI) operation. Classical MLI configurations are affected by performance issues such as poor power quality, uneconomic structure and low efficiency.

Findings

The variations in both carrier and reference signals and their performance are analyzed for the proposed inverter topologies. The simulation result compares unipolar and bipolar pulse-width modulation (PWM) techniques with total harmonic distortion (THD) results. The solar-fed 11-level MMI is controlled using various modulation strategies, which are connected to marine emergency lighting loads. Various modulation techniques are used to control the solar-fed 11-level MMI, which is connected to marine emergency lighting loads. The entire hardware system is controlled by using SPARTAN 3A field programmable gate array (FPGA) board and the least harmonics are obtained by improving the power quality.

Originality/value

The simulation result compares unipolar and bipolar PWM techniques with THD results. Various modulation techniques are used to control the solar-fed 11-level MMI, which is connected to marine emergency lighting loads. The entire hardware system is controlled by a SPARTAN 3A field programmable gate array (FPGA) board, and the power quality is improved to achieve the lowest harmonics possible.

Details

Circuit World, vol. 49 no. 4
Type: Research Article
ISSN: 0305-6120

Keywords

Article
Publication date: 28 February 2022

Jayarama Pradeep, Krishnakumar Vengadakrishnan, Anbarasan Palani and Thamizharasan Sandirasegarane

Multilevel inverters become very popular in medium voltage applications owing to their inherent capability of reconciling stepped voltage waveform with reduced harmonic distortion…

Abstract

Purpose

Multilevel inverters become very popular in medium voltage applications owing to their inherent capability of reconciling stepped voltage waveform with reduced harmonic distortion and electromagnetic interference. They have several disadvantages like more number of switching devices required and devices with high voltage blocking and need additional dc sources count to engender particular voltage. So this paper aims to propose a novel tri-source symmetric cascaded multilevel inverter topology with reduced number of switching components and dc sources.

Design/methodology/approach

A novel multilevel inverter has been suggested in this study, offering minimal switch count in the conduction channel for the desired voltage level under symmetric and asymmetric configurations. This novel topology is optimized to prompt enormous output voltage levels by employing constant power switches count and/or dc sources of voltage. The topology claims its advantages in generating higher voltage levels with lesser number of voltage sources, gate drivers and dc voltage sources.

Findings

The consummation of the proposed arrangement is verified in Matlab/Simulink R2015b, and an experimental prototype for 7-level, 13-level, 21-level, 29-level, 25-level and 49-level operation modes is constructed to validate the simulation results.

Originality/value

The proposed topology operated with six new algorithms for asymmetrical configuration to propel increased number of voltage levels with reduced power components.

Details

Circuit World, vol. 49 no. 4
Type: Research Article
ISSN: 0305-6120

Keywords

Article
Publication date: 23 March 2022

Dania Batool, Qandeel Malik, Tila Muhammad, Adnan Umar Khan and Jonghoon Kim

Multilevel inverters play a major role in the development of high-power industrial applications. In traditional low-level inverters (e.g. 2-level), the switching frequency is…

Abstract

Purpose

Multilevel inverters play a major role in the development of high-power industrial applications. In traditional low-level inverters (e.g. 2-level), the switching frequency is restricted and the harmonic spectrum of the system is hard to meet power requirements. Similarly, high-level inverters consist of a large number of switches, complex modulation techniques and complex hardware architecture, which results in high power loss and a significant amount of harmonic distortion. Furthermore, it is a must to ensure that every switch experiences the same stress of voltage and current. The purpose of this paper is to present an inverter topology with lower conduction and switching losses via reduced number of switches and equal voltage source-sharing technique.

Design/methodology/approach

Herein, the authors present a cascaded multilevel inverter having less power switches, a simple modulation technique and an equal voltage source-sharing phenomenon implementation.

Findings

The modulation technique becomes more complex when equal voltage source-sharing is to be implemented. In this study, a novel topology for the multilevel inverter with fewer switches, novel modulation technique, equal voltage source-sharing and Inductor-Capacitor-Inductor filter implementation is demonstrated to the reduce harmonic spectrum and power losses of the proposed system.

Originality/value

The nine-level inverter design is validated using software simulations and hardware prototype testing; the power losses of the proposed inverter design are elaborated and compared with the traditional approach.

Article
Publication date: 2 April 2019

Kanungo Barada Mohanty, Kishor Thakre, Aditi Chatterjee, Ashwini Kumar Nayak and Vinaya Sagar Kommukuri

This study aims to propose a modified topology for an asymmetric multilevel inverter as a basic module that generates 13-level output voltage waveform. The basic module consists…

Abstract

Purpose

This study aims to propose a modified topology for an asymmetric multilevel inverter as a basic module that generates 13-level output voltage waveform. The basic module consists of eight switches (unidirectional and bidirectional switch) and four DC voltage sources with unequal magnitudes. The proposed topology reduces the number of switches, isolated DC sources, cost and size of the circuit significantly as compared to other topologies. In addition, the proposed circuit provides a modular structure for a multilevel inverter.

Design/methodology/approach

The proposed configuration is implemented through simulation and hardware development of a single-phase 13-level inverter prototype. A multicarrier-based pulse width modulation scheme is adopted for generating switching signals by using dSPACE real-time controller.

Findings

To demonstrate the advantages of the proposed configuration, a comparative analysis is carried out with other multilevel topologies in terms of number of switches, gate driver circuits, on-state switches and blocking voltage on the switches. The comparison results confirmed that the proposed configuration requires less number of components for the same number of voltage levels. Moreover, the peak inverse voltage on switches and losses is lower in the proposed configuration.

Originality/value

In the available literature, numerous topologies are presented with main emphasis on the reduced components count. In this study, the authors proposed a new topology for an asymmetrical source configuration. The performance of the proposed topology under steady-state and dynamic conditions is evaluated using simulation and experimental implementation.

Details

World Journal of Engineering, vol. 16 no. 1
Type: Research Article
ISSN: 1708-5284

Keywords

Article
Publication date: 28 February 2023

Mingxiao Dai, Xu Peng, Xiao Liang, Xinyu Zhu, Xiaohan Liu, Xijun Liu, Pengcheng Han and Chao Wu

The purpose of this paper is to propose a DC-port voltage balance strategy realizing it by logic combination modulation (LCM). This voltage balance strategy is brief and high…

Abstract

Purpose

The purpose of this paper is to propose a DC-port voltage balance strategy realizing it by logic combination modulation (LCM). This voltage balance strategy is brief and high efficient, which can be used in many power electronic devices adopting the cascaded H-bridge rectifier (CHBR) such as power electronic transformer (PET).

Design/methodology/approach

The CHBR is typically as a core component in the power electronic devices to implement the voltage or current conversion. The modulation method presented here is aiming to solve the voltage imbalance problem occurred in the CHBR with more stable work station and higher reliability in ordinary operating conditions. In particular, by changing the switch states smoothly and quickly, the DC-port voltage can be controlled as the ideal value even one of the modules in CHBR is facing the load-removed problem.

Findings

By using the voltage balance strategy of LCM, the problem of voltage imbalance occurring in three-phase cascaded rectifiers has been solved properly. With the lower modulation depth, the efficiency of the strategy is shown to be better and stronger. The strategy can work reliably and quickly no matter facing the problem as load-removed change or the ordinary operating conditions.

Research limitations/implications

The limitation of the proposed DC-port voltage balance strategy is calculated and proved, in a three-module CHBR, the LCM could balance the DC-port voltage while one module facing the load-removed situation under 0.83 modulation depth.

Originality/value

This paper provides a useful and particular voltage balance strategy which can be used in the topology of three-phase cascaded rectifier. The value of the strategy is that a brief and reliable voltage balance method in the power electronic devices can be achieved. What is more, facing the problem, such as load-removed, in outport, the strategy can response quickly with no switch jump and switch frequency rising.

Details

Microelectronics International, vol. 40 no. 3
Type: Research Article
ISSN: 1356-5362

Keywords

Article
Publication date: 17 August 2021

Saeed Alizadeh, Mohammad Farhadi-Kangarlu and Behrouz Tousi

Multilevel inverters (MLIs) have been studied widely over the past two decades because of their inherent advantages and interesting features. However, most of the newly introduced…

Abstract

Purpose

Multilevel inverters (MLIs) have been studied widely over the past two decades because of their inherent advantages and interesting features. However, most of the newly introduced structures suffer from the increased standing voltage of the switches, which is defined as the maximum off-state voltage on the switches, losing modularity and increased number of direct current (DC) voltage sources. The purpose of this study is to propose a new hybrid MLI topology to alleviate the mentioned problems.

Design/methodology/approach

The proposed approach in this study includes using the advantage of two different topologies and combine them in a way that the advantages of both of the topologies are achieved. Therefore, the approach is to design a hybrid topology from two existing topologies so that a new topology has resulted.

Findings

This paper proposes a new hybrid MLI with lower power electronic switches and lowers DC voltage sources in comparison with the classic structures. The proposed MLIs maintain a balance between the number of switches, the standing voltage on the switches and the number of DC sources. The topology description, modulation method and comparative study have been presented. Also, another more reduced structure is presented for higher power factor operation. The MATLAB simulation and experimental results of a nine-level inverter have been presented to verify its operation.

Originality/value

The hybrid topology has a new structure that has not been presented before. It is important to emphasize that the topology combination and achieving the hybrid topology is wisely accomplished to improve some features of the MLI.

Details

Circuit World, vol. 49 no. 2
Type: Research Article
ISSN: 0305-6120

Keywords

Article
Publication date: 24 September 2020

Kannan Chandrasekaran, Nalin Kant Mohanty and Selvarasu Ranganathan

Multilevel inverter (MLI) is a prevailing sensible alternative to two-level inverters that offer a high-quality output voltage waveform, wherein the multiple input direct current…

Abstract

Purpose

Multilevel inverter (MLI) is a prevailing sensible alternative to two-level inverters that offer a high-quality output voltage waveform, wherein the multiple input direct current (DC) levels are established by using isolated DC sources, batteries and renewable energy sources. The purpose of this paper is to develop MLI to offer lower total harmonic distortion (THD), higher output voltage levels and reduced switching components for high power applications.

Design/methodology/approach

In this paper, a new tapped sources stack succored modified HX bridge MLI (TSSSMHXBMLI) topology is proposed which includes two modules, such as tapped sources stack (TSS) and modified HX bridge inverter, which perform their function in a single stage. Also, this paper outlines the formulaic implementation of the multicarrier/sub-harmonic pulse width modulation (MCPWM/SHPWM) in a Xilinx Spartan3E-500 field programmable gate array (FPGA) is suitable for the developed MLI.

Findings

The feasibility of the suggested topology is well proved by both simulation and experiment results.

Practical implications

This paper examines a new topology of TSSSMHXBMLI with a view to minimize total count of switching components against basic MLI topologies. The operating sequence of the suggested TSSSMHXBMLI topology is verified with the simulation study followed by an experimental investigation.

Originality/value

The simulation and experimental results of suggested MLI topology reveals to obtain lower THD, higher output voltage levels and reduced switching components for high power applications.

Details

Circuit World, vol. 47 no. 2
Type: Research Article
ISSN: 0305-6120

Keywords

1 – 10 of 79