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Votage source converter (VSC) based or current source converter (CSC) based shunt active power filter (SAPF)? It is the main question in harmonic elimination project using SAPF.This paper presents some criteria based on which the designer can decide which type of filter is more suitable for implementation of the project according to the nature and characteristics of the project.

Owing to the importance of cost and power losses criteria, relevant equations will be formulated and comparative analysis will be carried out between conventional structures based on CSC or VSC. For validation of analyses, simulation results have been studied in the MATLAB–SIMULINK environment.

Simulation results have examined two important criteria of power losses and costs. Although the results show the superiority of VSSAPF to CSSAPF in both criteria, this comparison is performed in a general and conventional condition. Using third-order filters of inductive-capacitive-inductive (LCL) type in VSSAPF, using insulated-gate bipolar transistor (IGBT) with reverse-voltage blocking ability in CSSAPF, which eliminates the need to use series diodes, and the use of superconducting technology in the DC-side endpoint in CSSAPF, not only reduce the difference of cost and losses in two schemes but also may lead to the lower costs and losses in CSSAPF than VSSAPF.

This paper is the result of many years working on active power filter and can be useful for engineers who are engaged in industrial projects.

To improve the voltage quality in AC adjustable high-power-speed-drive applications, the purpose of the paper is to provide a large number of output levels without increasing the number of commutation cells in the three-phase, n-cells flying capacitor voltage source asymmetric Multilevel Inverter (MI). The concept is based on the selection of different ratios between the breakdown voltages of two successive power devices. The new mathematical model is developed under various ratios, allows a thorough investigation of the harmonic distortions, flying capacitor energy storage, flying capacitor voltage balancing controllability and blocking voltage insulated gate bipolar transistor (IGBT) capability.

The asymmetrical design provides a large number of output levels without increasing the number of commutation cells. The important new analytical expression of capacitors voltage distribution is derived and extended to any ratio between the switch breakdown voltages of two successive power devices.

The detailed simulation study of the proposed concept has been carried out using MATLAB/Simulink. The power switches control of the three-phase three-cell MI is assured by new phase-shifted-multi-carrier pulse width modulation. The space vector representation is used to show the regular and irregular step output voltage in the complex plan (α,β).

In the paper, the n cells flying capacitor inverter, which typically operates in the (n + 1) levels mode, was extended to (n + 2), (n + 3) … until 2ⁿ levels with regular or irregular step output voltage. Consequently, the claimed advantages of the asymmetric MI are to improve power quality by reducing harmonic distortions and to reduce the requirement on capacitive energy storage in the circuit.

This paper aims to propose a new transformer-less inverter structure to reduce the common-mode leakage current in grid-connected photovoltaic (PV) systems.

The proposed circuit structure is the same as the conventional full-bridge inverter with three additional power switches in a triangular structure. These three power switches are between the bridge and the output filter, and they mitigate the common-mode leakage current flowing toward the PV panels’ capacitors. The common-mode leakage current mitigation is done through the three-direction clamping cell (TDCC) concept. By clamping the common-mode voltage to the middle voltage of the DC-link capacitors, the leakage current and the total harmonic distortion (THD) of the injected current to the grid is effectively reduced. Therefore, the efficiency is improved.

The switching modes and the control method are introduced. A comparison is carried out between the proposed structure and other solutions in the literature. The proposed topology and its respective control method are simulated by PSCAD/EMTDC software. The simulation results validate the advantages of the presented structure such as clamping the common-mode voltage and reducing leakage current and THD of injected current to the grid.

Presenting a single phase-improved inverter structure with low-leakage current for grid-connected PV power systems represents a significant original contribution to this work. The proposed structure can inject a sinusoidal current with low THD to the AC grid, and the power factor is unity on the AC side. In the half positive cycle, one of the switches in the TDCC is turned off under zero current. Besides, one of the other switches in TDCC is turned on with zero voltage and, therefore, its turn-on switching losses are zero. The efficiency of the proposed topology is high because of the reduction of leakage current and power losses. Accordingly, the presented topology can be a good solution to the leakage current elimination.

Models of power semiconductor devices for use in circuit simulators need to take account of effects which can be neglected in low power device models; they then become very complex and difficult to parameterise. The power PIN diode model described in this paper demonstrates how the use of empirically derived look‐up tables can simplify the characterisation problem and how non quasi‐static effects can be incorporated

This paper aims to study a multi-level reinjection current source converter (MLR-CSC) that adds attracting properties such as the self-commutation and pulse multiplication to the thyristor converter, which is of great significance for increasing the device capacity and reducing current harmonics on the grid side. Particularly, designing advantageous driving methods of the reinjection circuit is a critical issue that impacts the harmonic reduction and operation reliability of the MLR-CSC.

To deal with the mentioned issue, this paper takes the five-level reinjection current source converter (FLR-CSC), which is a type of the MLR-CSC, as the research object. Then, a method that can fully use combinations of five-level reinjection switching functions based on the concept of decomposition and recombination is proposed. It is worthy to mention that the proposed method can be easily extended to other multi-level reinjection circuits. Moreover, the working principle of the three-phase bridge circuit based on semi-controlled thyristors in the FLR-CSC that can achieve the four-quadrant power conversion is analyzed in detail.

Finally, the simulation and experimental results of FLR-CSC verify the effectiveness of the proposed reinjection circuit driving method and the operating principle of four-quadrant power conversion in this paper.

The outstanding features of the proposed driving method for FLR-CSC in this paper include combinations of reinjection switching functions that are fully exploited through three simple steps and can be conveniently extended to other multi-level reinjection circuits.

The conventional two-level inverter suffers from harmonics, higher direct current (DC) link voltage requirement, higher dv/dt and heating of the rotor. This study aims to overcome by using a multilevel inverter for brushless DC (BLDC) drive.

This paper presents a comparative analysis of the conventional two-level and three-level multilevel inverter for electric vehicle (EV) application using BLDC drive.

A three-level Active Neutral Point Clamped Multilevel inverter (ANPCMLI) is proposed in this paper which provides DC link voltage control. Simulation studies of the multilevel inverter and BLDC motor is carried out in MATLAB.

The ANPCMLI fed BLDC simulation results shows that there is the significant reduction in the BLDC motor torque ripple, switching stress and harmonic distortion in the BLDC motor fed ANPCMLI compared to the conventional two-level inverter. A prototype of ANPCMLI fed BLDC drive along with field programmable gate array (FPGA) control is built and MATLAB simulation results are verified experimentally.

The purpose of this paper is to improve the performance of block-multicolor (BMC) ordering for the parallelized incomplete-Cholesky-preconditioned conjugate gradient (ICCG) method. Then, the BMC ordering based on level structure arising in reverse Cuthill-McKee RCM ordering is newly proposed. The name of proposed method is abbreviated as “RBMC”. This paper shows the validity of proposed method by comparison with greedy-based multicolor (MC) and conventional BMC on the real symmetric linear system derived from the voltage-driven finite element method in time domain.

In RBMC, the blocking and coloring is performed level by level. The number of synchronizations in forward and backward substitution is reduced so that all blocks can be colored with two colors. However, the load-balance in forward and backward substitution might deteriorate because the irregular block matrices are distributed around diagonal. To uniformize load-balance in forward and backward substitution, the RBMC combined with the concept of block red-black ordering has been developed.

The modified RBMC was the most effective for reduction of the elapsed time among four orderings (MC, BMC, RBMC, modified RBMC) owing to improvement of convergence characteristic and load-balance.

The proposed method had two advantages: although the number of unknowns per block must be previously determined in BMC, its parameter is automatically determined in proposed method, the number of synchronization in forward and backward substitution can be reduced.

To develop a silicon lateral Schottky rectifier with low forward voltage drop and low reverse leakage current while its breakdown voltage is significantly larger than that of a conventional Schottky rectifier.

A two‐dimensional device simulation has been used, to examine the effect lateral dual sidewall Schottky concept on the current‐voltage characteristics of a lateral Schottky rectifier on silicon‐on‐insulator. The Schottky contact consists of a low‐barrier metal and a high‐barrier metal.

Results show that, during forward bias, the low‐barrier Schottky (LBS) contact conducts resulting in a low forward voltage drop. During the reverse bias, the LBS contact is shielded by the depletion region of the high‐barrier Schottky contact resulting in a low reverse leakage current.

With this approach, silicon Schottky rectifiers with low power dissipation and improved breakdown voltage can be realized.

The proposed device has a large commercial potential as a low‐power high‐voltage switching device.

Multilevel inverters become very popular in medium voltage applications owing to their inherent capability of reconciling stepped voltage waveform with reduced harmonic distortion and electromagnetic interference. They have several disadvantages like more number of switching devices required and devices with high voltage blocking and need additional dc sources count to engender particular voltage. So this paper aims to propose a novel tri-source symmetric cascaded multilevel inverter topology with reduced number of switching components and dc sources.

A novel multilevel inverter has been suggested in this study, offering minimal switch count in the conduction channel for the desired voltage level under symmetric and asymmetric configurations. This novel topology is optimized to prompt enormous output voltage levels by employing constant power switches count and/or dc sources of voltage. The topology claims its advantages in generating higher voltage levels with lesser number of voltage sources, gate drivers and dc voltage sources.

The consummation of the proposed arrangement is verified in Matlab/Simulink R2015b, and an experimental prototype for 7-level, 13-level, 21-level, 29-level, 25-level and 49-level operation modes is constructed to validate the simulation results.

The proposed topology operated with six new algorithms for asymmetrical configuration to propel increased number of voltage levels with reduced power components.

This paper aims to present an inverter with a current-source input for 400 Hz avionic systems to have a system which removes DC-link capacitors and presents a high efficiency.

A battery-powered DC link inductor generates a constant-current source. A single high-frequency switch is used to provide a sinusoidally modulated current before the inverter. The output of the switch is “unfolded” by a thyristor-based H-bridge inverter to generate an AC output current. The system uses a CL low-pass filter to obtain a 400 Hz pure sine wave by removing pulse width modulation components.

Simulations and Typhoon HIL real-time experiments were performed with closed-loop control to validate the proposed inverter concept while meeting the critical standards of MIL-STD-704F.

This current source inverter topology is suitable for avionic systems that require 400 Hz output frequency. The topology uses small DC-link inductor and eliminates bulky capacitor which determines the inverter lifetime.