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The purpose of this study is to investigate the effects of load and rotation speed on dry sliding of silicon nitride, including a series of tribological behaviors (friction coefficient, wear rate, temperature rise, etc.) and wear mechanism. Through the analysis of the above characteristics, the influence law of load and speed on them and the internal relationship between them are determined, and then the best comprehensive performance parameters of silicon nitride full-ceramic spherical plain bearings in dry sliding are predicted, which can provide guidance for the operation condition of silicon nitride full-ceramic spherical plain bearings in dry sliding.

The experimental study of different loads and rotation speeds under dry friction conditions was carried out by the using ball-disk sliding test method.

With the increase of load, the friction coefficient of silicon nitride friction pair and the wear rate of silicon nitride ball decrease continuously. With the increase of rotation speed, the friction coefficient of silicon nitride friction pair first increases and then decreases, and the wear of silicon nitride ball first increases and then decreases. With the increase of load and rotation speed, the wear mechanism eventually changes to adhesive wear.

Because of the low timeliness and inefficiency of bearing experiments, this work adopts a simple ball-disk model to comprehensively explore the influence rules of different conditions, which provides a theoretical basis for the subsequent practical application of silicon nitride full-ceramic spherical plain bearings.

To fabricate submicrometer thin membrane of silicon nitride and silicon dioxide over an anisotropically etched cavity in (100) silicon.

PECVD of silicon dioxide and Silcion nitride layers of compatible thicknesses followed by thermal annealing in nitrogen ambients at 1,000°C for 30 min, leads to stable membrane formation. Anisotropic etching of (100) silicon below the membrane through channels on the sides has been used with controlled cavity dimensions.

Lateral front side etching through channels slows down etching rate drastically. The etching mechanism has been discussed with experimental details.

Vacuum sealed cavity membranes can be realised for micro sensor applications.

The process is new and feasible for micro sensor technologies.

A viscoelastic boundary element method has been developed to model the motion of silicon dioxide and silicon nitride during thermal oxidation of silicon. This technique uses Kelvin's solution reformulated according to the correspondence principle on viscoelasticity. Constant‐velocity loading is chosen to ensure smooth variations in displacement and stress behavior for a wide range of relaxation times.

In the development of engine components a number of special techniques are used to combat the hostile operating environment which usually includes high and cyclic forces, high and cyclic temperatures, sliding and often corrosion and/or erosion. Examples of the use of these techniques, namely the development of special materials for substrate and surface, of mathematical modelling verified by telemetry, and of special machining, to solve the problems of the operating environment, are given in respect of piston rings, cylinder liners, bearings, camshafts and valve seat inserts. It is noted that of these techniques the development of special surface and substrate materials provides the most assistance. The application of materials technology to surface and substrate is illustrated with respect to ceramics, including silicon nitride, silicon carbide, zirconia and alumina. Applications underdevelopment include insulation, improvement of wear resistance, reduction of mass, increase of operating temperature and the reinforcement of metals, for example reinforcement of aluminium alloys using alumina fibres incorporated by squeeze casting. The several means open to improve the properties of gravity cast aluminium silicon alloys are reviewed and the improvement of properties obtained by squeeze casting without reinforcement are illustrated. The further enhancement of these properties by the design of an appropriate fibre reinforcement system, incorporated by squeeze casting, is then described. Its application to the reinforcement of a combustion bowl subject to high thermal stress is discussed and the performance of the resulting piston in relation to unreinforced pistons is described. In conclusion the market, product and process aspects of the development are correlated to demonstrate its overall value and to identify further applications.

The purpose of this paper is to provide a new three dimension physically based model to calculate the initial stress in silicon germanium (SiGe) film due to thermal mismatch after deposition. We should note that there are many other sources of initial stress in SiGe films or in the substrate. Here, the author is focussing only on how to model the initial stress arising from thermal mismatch in SiGe film. The author uses this initial stress to calculate numerically the resulting extrinsic stress distribution in a nanoscale PMOS transistor. This extrinsic stress is used by industrials and manufacturers as Intel or IBM to boost the performances of the nanoscale PMOS and NMOS transistors. It is now admitted that compressive stress enhances the mobility of holes and tensile stress enhances the mobility of electrons in the channel.

During thermal processing, thin film materials like polysilicon, silicon nitride, silicon dioxide, or SiGe expand or contract at different rates compared to the silicon substrate according to their thermal expansion coefficients. The author defines the thermal expansion coefficient as the rate of change of strain with respect to temperature.

Several numerical experiments have been used for different temperatures ranging from 30 to 1,000°C. These experiments did show that the temperature affects strongly the extrinsic stress in the channel of a 45 nm PMOS transistor. On the other hand, the author has compared the extrinsic stress due to lattice mismatch with the extrinsic stress due to thermal mismatch. The author found that these two types of stress have the same order (see the numerical results on Figures 4 and 12). And, these are great findings for semiconductor industry.

Front-end process induced extrinsic stress is used by manufacturers of nanoscale transistors as the new scaling vector for the 90 nm node technology and below. The extrinsic stress has the advantage of improving the performances of PMOSFETs and NMOSFETs transistors by enhancing mobility. This mobility enhancement fundamentally results from alteration of electronic band structure of silicon due to extrinsic stress. Then, the results are of great importance to manufacturers and industrials. The evidence is that these results show that the extrinsic stress in the channel depends also on the thermal mismatch between materials and not only on the material mismatch.

The model the author is proposing to calculate the initial stress due to thermal mismatch is novel and original. The author validated the values of the initial stress with those obtained by experiments in Al-Bayati et al. (2005). Using the uniaxial stress generation technique of Intel (see Figure 2). Al-Bayati et al. (2005) found experimentally that for 17 percent germanium concentration, a compressive initial stress of 1.4 GPa is generated inside the SiGe layer.

The purpose of this paper is to describe the fabrication of a miniaturized membrane type double cavity vacuum‐sealed micro sensor for absolute pressure using front‐side lateral etching technology.

Potassium hydroxide‐based anisotropic etching of single crystal silicon is used to realize the cavities under the membrane type diaphragms through channels on the sides. The diaphragms consist of composite layers of plasma‐enhanced chemical vapour deposition (PECVD) of silicon nitride and silicon dioxide. PECVD of silicon dioxide is done for sealing the channels and the cavity in vacuum. Boron thermal diffusion in low‐pressure chemical vapour deposition of polysilicon layer over the membrane is done for realizing resistors. The fabricated device uses Wheatstone half bridge circuit to read the variation of resistance with respect to an applied pressure.

A double cavity vacuum‐sealed absolute pressure micro sensor has been fabricated successfully using front‐side lateral etching technology and has been measured for pressure range of 0‐0.45 MPa. The measured pressure sensitivity of two pressure sensors is 9.28 and 10.44 mV/MPa.

The paper shows that front‐side lateral etching technology is feasible in the fabrication of small vacuum‐sealed cavities and absolute pressure sensors.

The purpose of this paper is to discuss the fabrication technology and test of thermo-pneumatic actuator utilizing Si₃N₄-polyimide thin film membrane. Thin film polyimide membrane capped with Si₃N₄ thin layer is used as actuator membrane which is able to deform through thermal forces inside an isolated chamber. The fabricated membrane will be suitable for thermo-pneumatic-based membrane actuation for lab-on-chip application.

The actuator device consisting of a micro-heater, a Si-based micro-chamber and a heat-sensitive square-shaped membrane is fabricated using surface and bulk-micromachining process, with an additional adhesive bonding process. The polyimide membrane is capped with a thin silicon nitride layer that is fabricated by using etch stop technique and spin coating.

The deformation property of the membrane depend on the volumetric expansion of air particles in the heat chamber as a result of temperature increase generated from the micro-heater inside the chamber. Preliminary testing showed that the fabricated micro-heater has the capability to generate heat in the chamber with a temperature increase of 18.8 °C/min. Analysis on membrane deflection against temperature increase showed that heat-sensitive thin polyimide membrane can perform the deflection up to 65 μm for a temperature increase of 57°C.

The dual layer polyimide capped with Si₃N₄ was used as the membrane material. The nitride layer allowed the polyimide membrane for working at extreme heat condition. The process technique is simple implementing standard micro-electro-mechanical systems process.

This paper gives a bibliographical review of the finite element methods (FEMs) applied to the analysis of ceramics and glass materials. The bibliography at the end of the paper contains references to papers, conference proceedings and theses/dissertations on the subject that were published between 1977‐1998. The following topics are included: ceramics – material and mechanical properties in general, ceramic coatings and joining problems, ceramic composites, ferrites, piezoceramics, ceramic tools and machining, material processing simulations, fracture mechanics and damage, applications of ceramic/composites in engineering; glass – material and mechanical properties in general, glass fiber composites, material processing simulations, fracture mechanics and damage, and applications of glasses in engineering.

In this paper, we aim to investigate the influence of the hydrogenated silicon nitride layers deposited by a large area 13.56 MHz plasma-enhanced chemical vapour deposition system on the electrical activity of the surface and interfaces of the grains for solar cells fabricated on microcrystalline silicon and multicrystalline silicon.

The characterization of current-voltage parameters of 25 cm² solar cells manufactured with different passivation and antireflective layers are presented. After spectral response measurements, external quantum efficiency was calculated, and the final results are shown graphically. The passivation effect concerning grain areas was evaluated more precisely by light-beam-induced current scan maps (LBIC).

The final impact of the type of passivation layer on surface and grain boundary photoconvertion in solar cells is determined.

The passivation effect concerning grain areas was evaluated more precisely by LBIC.

The purpose of this paper is to present a selective wet‐etching method of boron doped low‐pressure chemical vapour deposition (LPCVD) polysilicon film for the realization of piezoresistors over the bulk micromachined diaphragm of (100) silicon with improved yield and uniformity.

The method introduces discretization of the LPCVD polysilicon film using prior etching for the grid thus dividing each chip on the entire wafer. The selective etching of polysilicon for realizing of piezoresistors is limited to each chip area with individual boundaries.

The method provides a uniform etching on the entire silicon wafer irrespective of its size and leads to economize the fabrication process in a batch production environment with improved yield.

The method introduces one extra process step of photolithography and subsequent etching for discretizing the polysilicon film.

The method is useful to enhance yield while defining metal lines for contact purposes on fabricated electronic structures using microelectronics. Stress developed in LPCVD polysilicon can be removed using proposed approach of discretization of polysilicon film.

The work is an outcome of regular fabrication work using conventional approaches in an R&D environment. The proposed method replaces the costly reactive ion etching techniques with stable reproducibility and ease in its implementation.