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The purpose of the present study was to review the thermo-mechanical challenges of reflowed lead-free solder joints in surface mount components (SMCs). The topics of the review include challenges in modelling of the reflow soldering process, optimization and the future challenges in the reflow soldering process. Besides, the numerical approach of lead-free solder reliability is also discussed.

Lead-free reflow soldering is one of the most significant processes in the development of surface mount technology, especially toward the miniaturization of the advanced SMCs package. The challenges lead to more complex thermal responses when the PCB assembly passes through the reflow oven. The virtual modelling tools facilitate the modelling and simulation of the lead-free reflow process, which provide more data and clear visualization on the particular process.

With the growing trend of computer power and software capability, the multidisciplinary simulation, such as the temperature and thermal stress of lead-free SMCs, under the influenced of a specific process atmosphere can be provided. A simulation modelling technique for the thermal response and flow field prediction of a reflow process is cost-effective and has greatly helped the engineer to eliminate guesswork. Besides, simulated-based optimization methods of the reflow process have gained popularity because of them being economical and have reduced time-consumption, and these provide more information compared to the experimental hardware. The advantages and disadvantages of the simulation modelling in the reflow soldering process are also briefly discussed.

This literature review provides the engineers and researchers with a profound understanding of the thermo-mechanical challenges of reflowed lead-free solder joints in SMCs and the challenges of simulation modelling in the reflow process.

The unique challenges in solder joint reliability, and direction of future research in reflow process were identified to clarify the solutions to solve lead-free reliability issues in the electronics manufacturing industry.

This paper aims to offer a convenient method to develop an oven recipe for a specific soldering profile in a reflow process. The method is devised to quickly achieve proper profile shape and heating factor Q_η, a measure of success for high reliability of the solder joints reflowed.

An in‐depth analysis of the heating mechanism and some experiments of the reflow soldering process are performed to research on how to realize a specific shape reflow profile were conducted.

Heating mechanism analysis and experiments demonstrate that the combinatorial parameters based method is feasible to do thermal profiling.

The mapping function among a particular configured PCBA, an oven used, a target reflow profile and an optimal range of the heating factor should be further established for fast and reliable production of reflow soldering.

Provides a methodology for designing an oven recipe for reflow soldering production.

An oven recipe can be quickly attained with the approach established in this paper, facilitating the formation of solder joints with high reliability during the reflow soldering process.

This paper aims to provide the proper preset temperatures of the convection reflow oven when reflowing a printed circuit board (PCB) assembly with varied sizes of components simultaneously.

In this study, computational fluid dynamics modeling is used to simulate the reflow soldering process. The training data provided to the machine learning (ML) model is generated from a programmed system based on the physics model. Support vector regression and an artificial neural network are used to validate the accuracy of ML models.

Integrated physical and ML models synergistically can accurately predict reflow profiles of solder joints and alleviate the expense of repeated trials. Using this system, the reflow oven temperature settings to achieve the desired reflow profile can be obtained at substantially reduced computation cost.

The prediction of the reflow profile subjected to varied temperature settings of the reflow oven is beneficial to process engineers when reflowing bulky components. The study of reflowing a new PCB assembly can be started at the early stage of board design with no need for a physical profiling board prototype.

This study provides a smart solution to determine the optimal preset temperatures of the reflow oven, which is usually relied on experience. The hybrid physics–ML model providing accurate prediction with the significantly reduced expense is used in this application for the first time.

Reflow soldering is one of the most significant factors in determining solder joint defect rate. This study aims to introduce an innovative approach for optimizing the multiple performances of the reflow soldering process.

This study aims to minimize the solder joint defect rate of a ball grid array (BGA) package by using the grey‐based Taguchi method. The entropy measurement method was employed together with the grey‐based Taguchi method to compute for the weights of each quality characteristic. The Taguchi L18 orthogonal array was performed, and the optimal parameter settings were determined. Various factors, such as slope, temperature, and reflow profile time, as well as two extreme noise factors, were considered. The thermal stress, peak temperature, reflow time, board‐ and package‐level temperature uniformity were selected as the quality characteristics. These quality characteristics were determined using the numerical method. The numerical method comprises the internal computational flow that models the reflow oven coupled with the structural heating and cooling models of the BGA assembly. The Multi‐physics Code Coupling Interface was used as the coupling software.

The analysis of variance results reveals that the cooling slope was the most influential factor among the multiple quality characteristics, followed by the soaking temperature and the peak temperature. Experimental confirmation test results show that the performance characteristics improved significantly during the reflow soldering process.

The proposed approach greatly reduces solder joint defects and enhances solutions to lead‐free reliability issues in the electronics manufacturing industry.

The findings provide new guidelines to the optimization method which are very useful for the accurate control of the solder joint defect rate within components and printed circuit board (PCB) which is one of the major requirements to achieve high reliability of electronic assemblies.

This paper aims to compare and study two-dimensional (2D) and three-dimensional (3D) computational fluid dynamics simulation results of gas flow velocity in a convection reflow oven and show the differences of the different modeling aspects. With the spread of finer surface-mounted devices, it is important to understand convection reflow soldering technology more deeply.

Convection reflow ovens are divided into zones. Every zone contains an upper and a lower nozzle-matrix. The gas flow velocity field is one of the most important parameters of the local heat transfer in the oven. It is not possible to examine the gas flow field with classical experimental methods due to the extreme circumstances in the reflow oven. Therefore, numerical simulations are necessary.

The heat transfer changes highly along the moving direction of the assembly, and it is nearly homogeneous along the traverse direction of the zones. The gas flow velocity values of the 2D model are too high due to the geometrical distortions of the 2D model. On the other hand, the calculated flow field of the 2D model is more accurate than in the 3D model due to the finer mesh.

Investigating the effects of tall components on a printed wiring board inside the gas flow field and further analysis of the mesh size effect on the models.

The presented results can be useful during the design of a simulation study in a reflow oven (or in similar processes).

The presented results provide a completely novel approach from the aspect of 2D and 3D simulations of a convection reflow oven. The results also reveal the heat transfer differences.

In surface mount assembly (SMA) process, small components are subjected to high temperature variations, which result in components’ deformation and cracking. Because of this phenomenon, cracks are formed in the body of carbonyl powder ceramic inductor (CPCI) in the preheat and cooling stages of the reflow oven. These cracks become the main cause of board failure in the ageing process. The purpose of this paper is to ascertain the thermal stress, thermal expansion of carbonyl iron ceramics and its effects on crack commencement and proliferation in the preheat stage of reflow oven. Moreover, this paper also categorized and suggested important parameters of reflow profile that could be used to eliminate these thermal shock failures.

In this paper, two different reflow profiles were studied that evaluate the thermal shock of CPCI during varying ΔT at the preheat zone of the reflow oven. In the first profile, the change in temperature ΔT at preheat zone was set to 3.26°C/s, which has resulted in a number of device failures because of migration of micro cracks through the CPCI. In the second profile, this ΔT at preheat stage is minimized to 2.06°C/s that eliminated the thermal stresses; hence, the failure rates were significantly reduced.

TMPC0618H series lead (Pb)-free CPCI is selected for this study and its thermal expansion and thermal shock are observed in the reflow process. It is inferred from the results that high ΔT at preheat zone generates cracks in the carbonyl powder-type ceramics that cause device failure in the board ageing process. Comparing materials, carbonyl powder ceramic components are less resistant to thermal shock and a lower rate of temperature change is desirable.

The proposed study presents an experimental analysis for mitigating the thermal shock defects. The realization of the proposed approach is validated with experimental data from the printed circuit boards manufacturing process.

The purpose of this paper is to present the experimental and simulation studies on the influence of copper pillar bump structure on flip chip packaging during reflow soldering.

In this work, solidification/melting modelling and volume of fluid modelling were used. Reflow soldering process of Cu pillar type FC was modelled using computational fluid dynamic software (FLUENT). The experimental results have been validated with the simulation results to prove the accuracy of the numerical method.

The findings of this study reveal that solder volume is the most important element influencing reflow soldering. The solder cap volume reduces as the Cu pillar bump diameter lowers, making the reflow process more difficult to establish a good solder union, as less solder is allowed to flow. Last but not least, the solder cap height for the reflow process must be optimized to enable proper solder joint formation.

This study provides a basis and insights into the impact of copper pillar bump structure on flip chip packaging during reflow soldering that will be advancing the future design of 3D stack package. This study also provides a superior visualization and knowledge of the melting and solidification phenomenon during the reflow soldering process.

The computational fluid dynamics analysis of copper pillar bump structure on flip chip packaging during reflow soldering is scant. To the authors’ best knowledge, no research has been concentrated on copper pillar bump size configurations in a thorough manner. Without the in-depth study, copper pillar bump size might have the impact of copper pillar bump structure on flip chip packaging during reflow soldering. Five design of parameter of flip chip IC package model was proposed for the investigation of copper pillar bump structure on flip chip packaging during reflow soldering.

In this paper, analytical modelling of heat distribution along the thickness of different printed circuit board (PCB) substrates is presented according to the 1 D heat transient conduction problem. This paper aims to reveal differences between the substrates and the geometry configurations and elaborate on further application of explicit modelling.

Different substrates were considered: classic FR4 and polyimide, ceramics (BeO, Al₂O₃) and novel biodegradables (polylactic-acid [PLA] and cellulose acetate [CA]). The board thicknesses were given in 0.25 mm steps. Results are calculated for heat transfer coefficients of convection and vapour phase (condensation) soldering. Even heat transfer is assumed on both PCB sides.

It was found that temperature distributions along PCB thicknesses are mostly negligible from solder joint formation aspects, and most of the materials can be used in explicit reflow profile modelling. However PLA shows significant temperature differences, pointing to possible modelling imprecisions. It was also shown, that while the difference between midplane and surface temperatures mainly depend on thermal diffusivity, the time to reach solder alloy melting point on the surface depends on volumetric heat capacity.

Results validate the applicability of explicit heat transfer modelling of PCBs during reflow for different heat transfer methods. The results can be incorporated into more complex simulations and profile predicting algorithms for industrial ovens controlled in the wake of Industry 4.0 directives for better temperature control and ultimately higher soldering quality.

Flip chips were assembled on to ceramic boards using eutectic tin‐lead solder with underfill and with/without encapsulation for temperature cycling and high‐temperature‐high‐humidity tests. After 1.5 years of testing, the reliability performance of the flip chip on board (FCOB) assemblies was compared. All of the FCOB assemblies with underfill, but without encapsulation, survived 5,778 cycles of the temperature cycling test following 5,005 hours of the high‐temperature and high‐humidity test. The results show that encapsulation may not necessarily enhance the reliability of flip chip assemblies and might therefore be omitted.