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An annual substation equipment failure report says 3/7 capacitive voltage transformer (CVT) got damaged because of ferroresonance overvoltage. The conventional mitigation circuit fails to protect the transformer as the overvoltage may fall in the range between 2 and 4 per unit. It is necessary to develop a device to suppress the overvoltage as well as overcurrent of the CVT. This study aims to propose the suitability of memristor emulator as a mitigation circuit for ferroresonance.

The literature implies that a nonlinear circuit can protect the transformer against ferroresonance. An attempt is made with a memristor emulator using Operational Amplifier (OPAMP) for the mitigation of ferroresonance in a prototype transformer. The circuit is simulated using PSpice and validated for its ideal characteristics using hardware implementation. The nonlinear memductance is designed which is required to mitigate the ferroresonance. The mitigation performance has been compared with conventional method along with fast Fourier transform (FFT) analysis.

While the linear resistor recovers the secondary voltage by 74.1%, the memristor emulator does it by 82.05% during ferroresonance. Also, the total harmonic distortion (THD) of ferroresonance signal found to be 22.06% got improved as 2.56% using memristor emulator.

The suitability of memristor emulator as a mitigation circuit for ferroresonance is proposed in this paper. As ferroresonance occurs in instrument transformers which have extra high voltage (EHV) rated primary windings and (110 V/[110 V/1.732]) rated secondary windings, the mitigation device is proposed to be connected as a nonlinear load across the secondary windings of the transformer. This paper discusses the preliminary work of ferroresonance mitigation in a prototype transformer. The mitigation circuit may have memristor or meminductor for ferroresonance mitigation when they are commercially available in future.

The electronic component-based memristor emulator may not work at 110 V practically as they may be rated at low power. Hence, chemical component-based memristor emulator was developed to do the same. The authors like to clarify that the memristor will be a solution for ferroresonance in future not the memristor emulator circuit.

With the real form of memristor, the transistor world will be replaced by it and may have a revolution in the field of electronics, VLSI, etc. This contribution attempts to project the use of memristor in a smaller scale in high-voltage engineering.

The electronic component-based memristor emulator is proposed as a mitigation circuit for ferroresonance. The hypothesis has been verified successfully in a prototype transformer. Testing circuit of memristor emulator involves transformer, practically. The mitigation performance has been compared with conventional method technically and justified with FFT analysis.

The purpose of this paper is to construct a proportion-integral-type (PI-type) memristor, which is different from that of the previous memristor emulator, but the constructing memristive chaotic circuit possesses line equilibrium, leading to the emergence of the initial conditions-related dynamical behaviors.

This paper presents a PI-type memristor emulator-based canonical Chua’s chaotic circuit. With the established mathematical model, the stability region for the line equilibrium is derived, which mainly consists of stable and unstable regions, leading to the emergence of bi-stability because of the appearance of a memristor. Initial conditions-related dynamical behaviors are investigated by some numerically simulated methods, such as phase plane orbit, bifurcation diagram, Lyapunov exponent spectrum, basin of the attraction and 0-1 test. Additionally, PSIM circuit simulations are executed and the seized results validate complex dynamical behaviors in the proposed memristive circuit.

The system exhibits the bi-stability phenomenon and demonstrates complex initial conditions-related bifurcation behaviors with the variation of system parameters, which leads to the occurrence of the hyperchaos, chaos, quasi-periodic and period behaviors in the proposed circuit.

These memristor emulators are simple and easy to physically fabricate, which have been increasingly used for experimentally demonstrating some interesting and striking dynamical behaviors in the memristor-based circuits and systems.

This paper aims to propose the modeling of nanostructured memristor, and the circuit of amplitude modulator was designed and analyzed with memristor. The simulation results show that the nanostructured memristor can be utilized to implement the desired amplitude modulated signal.

The modeling of nanostructured memristor is proposed in this paper, and the circuit of amplitude modulator was designed and analyzed with memristor, amplifiers and BPF device. For measuring the modulated signal, the emulator circuit of memristor is designed. The simulation results show that the nanostructured memristor can be utilized to implement the desired amplitude modulated signal.

The innovations of this work are as follows: the AM modulator circuit using memristor has been proposed, analyzed and simulated. The emulator of memristor is given.

The innovations of this work are as follows: the AM modulator circuit using memristor has been proposed, analyzed and simulated. The emulator of memristor is given, and the results of this work demonstrate that the nonlinearity of the memristor can be used to generate the desired amplitude modulation free of harmonic sidebands, because of distortion of the modulating signal.

The purpose of the paper is to report an emulation configuration of a three pinch-off memristor (TPM), whose transient characteristics consist three cross-over points on the voltage-current plane, which is dissimilar to a conventional memristor. These characteristics can be very useful in memristor-based multi-bit memory devices and hyperchaotic oscillators.

The work describes the Mathematical framework for TPM and a circuit emulator based on the derived conditions. The configuration is based on five operational transconductance amplifier (OTAs) and four grounded passive elements. After which, we have verified its operation using personal simulation program with integrated circuit emphasis simulation environment. Finally, the implementation of OTA-based TPM using commercial integrated circuit (IC) LM13700 has also been presented.

It has been shown that a flux-dependent memductance expression of cubic order can show three intersections on the VI contour under certain parameter related constraints. Moreover, the OTA-based emulator reported in the work is very compact in nature because of the no use of external multiplier IC/circuitry, which has been popular in previous emulators.

For the first time, a multiple cross-over memristor emulator has been reported which can operate under practical operating conditions such as at practical operating frequencies and sinusoidal excitation.

The purpose of this paper is to design and construct an amplitude shift keying (ASK) modulator, which, using the digital binary modulating signal, controls a floating memristor emulator (MR) internally without the need for additional control circuits to achieve the ASK modulated wave.

A binary digital unipolar signal to be modulated is converted by a pre-processor circuit into a suitable bipolar modulating direct current (DC) signal for the control of the MR state, using current conveyors the carrier signal’s amplitude is varied with the change in the memristance of the floating MR. A high pass filter is then used to remove the DC control signal (modulating signal) leaving only the modulated carrier signal.

The results from the experiment and simulation are in agreement showed that the MR can be switched between two states and that a change in the carrier signals amplitude can be achieved by using an MR. Thus, showing that the circuit behavior is in line with the proposed theory and validating the said theory.

In this paper, the binary signal to be modulated is modified into a suitable control signal for the MR, thus the MR relies on the internal operation of the modulator circuit for the control of its memristance. An ASK modulation can then be achieved using a floating memristor without the need for additional circuits or signals to control its memristance.

In this work, a true random number generator is designed by sampling the double-scroll analog continuous-time chaotic circuit signals.

A Chua circuit based on memristance simulator is designed to obtain a non-linear term for a chaotic dynamic system. It is implemented on the board by using commercially available integrated circuits and passive elements. A low precision ADC which is commonly found in the market is used to sample the chaotic signals. The mathematical analysis of the chaotic circuit is verified by experimental results.

It is aimed to be one of the pioneering studies (including low precision ADC) in the literature on the implementation of memristive chaotic random number generators.

Two new methods are proposed for post-processing and creating random bit array using XOR operator and J-K flip flop. The bit stream obtained by a full-hardware implementation successfully passed the NIST-800-22 test. In this respect, the availability of the memristance simulator circuit, memristive chaotic double-scroll attractor, proposed random bit algorithm and the randomness of the memristive analog continuous-time chaotic true number generator were also verified.

The purpose of this paper is to develop two types of simple jerk circuits and to carry out their dynamical analyses using a unified mathematical model.

Two types of simple jerk circuits only involve a nonlinear resistive feedback channel composited by a nonlinear device and an inverter. The nonlinear device is implemented through parallelly connecting two diode-switch-based series branches. According to the classifications of switch states and circuit types, a unified mathematical model is established for these two types of simple jerk circuits, and the origin symmetry and scale proportionality along with the origin equilibrium stability are thereby discussed. The coexisting bifurcation behaviors in the two types of simple jerk systems are revealed by bifurcation plots, and the origin symmetry and scale proportionality are effectively demonstrated by phase plots and attraction basins. Moreover, hardware experimental measurements are performed, from which the captured results well validate the numerical simulations.

Two types of simple jerk circuits are unified through parallelly connecting two diode-switch-based series branches and a unified mathematical model with six kinds of nonlinearities is established. Especially, the origin symmetry and scale proportionality for the two types of simple jerk systems are discussed quantitatively. These jerk circuits are all simple and inexpensive, easy to be physically implemented, which are helpful to explore chaos-based engineering applications.

Unlike previous works, the significant values are that through unifying these two types of simple jerk systems, a unified mathematical model with six kinds of nonlinearities is established, upon which symmetrically scaled coexisting behaviors are numerically disclosed and experimentally demonstrated.

This paper aims to develop a mathematical model for four-lobe memristor (FLM) element. The four-lobe memristive behaviour can be used in realization of hyperchaotic oscillators and implementation of multi-bit memories. For verification of the developed mathematical framework, two FLM circuit emulators have been presented using VDCC and IC LM13700, respectively.

A mathematical model for FLM has been developed in which, the condition for the existence of symmetrical four lobes, instances and coordinates of the end points of lobes has been derived and presented. Using this mathematical framework, a FLM emulator based on VDCC has been developed. To validate the possibility of practical implementation of FLM concept, an IC LM13700-based circuit has also been developed. The workability of VDCC based circuit has been verified by running simulations in PSPICE environment using CMOS VDCC model. Similarly, the behaviour of LM13700 IC-based circuit has been confirmed by SPICE model of LM13700 IC.

It has been shown mathematically that under certain conditions, third-order flux dependent equation of memductance can be used to generate four lobes on the transient v-i plane. Also, two FLM emulators without using any voltage multiplier circuit/IC have been reported.

From the best knowledge of the authors, there are no such FLM emulators that have been reported in literature so far, which operates at practical operating frequencies.

The purpose of this paper is to construct a flux-controlled memcapacitor (MC) emulator without grounded restriction with the binary operation ability. The active first-order low-pass filter (LPF) and high-pass filter (HPF) circuits are constructed by replacing the capacitor with MC.

The output saturation of the active device is innovatively adopted to realize the binary operation of MC with two memcapacitance values. By applying the direct current control voltage together with the input signal, the memcapacitance can be controlled, and hence, cut-off frequency of the filters can be adjusted without changing the circuit structure.

Experiments and simulation results show that the new filter has good frequency selectivity. Both LPF and HPF can change the cut-off frequency by changing the positive and negative control voltage. The experimental and simulation results are in good agreement with the theoretical analysis, which proves the feasibility and validity of the emulator and the filters.

These MC emulators are simple and easy to physically fabricate, which have been increasingly used for experiment. It also provide an effective reference for device miniaturization and low power consumption.

The ammeter can measure the direct current and low-frequency alternating current through the wires, but it is difficult to measure complex waveforms. The oscilloscope can measure complex waveforms, but it is easy to measure the voltage waveform and difficult to measure the current waveform. Thus, how to measure complex current waveforms with oscilloscope is an important and crucial issue that needs to be solved in practical engineering applications. To solve the above problems, an active short circuit line method is proposed to measure the volt-ampere characteristic curve of chaotic circuits.

In this paper, an active short circuit line method is proposed to measure the volt-ampere characteristic curve of various chaotic circuits especially for memristive systems. A memristor-based chaotic system is introduced, and the corresponding memristor-based circuit is constructed and implemented by using electronic components.

The chaotic attractors and volt-ampere characteristic curve of the memristor-based chaotic circuit are successfully analyzed and verified by oscilloscope measurement with the proposed active short circuit line method. Accordingly, the hardware circuit experiments are carried out to validate the effectiveness and feasibility of the active short circuit line method for these chaotic circuits. A good agreement is shown between the numerical simulations and the experimental results.

The primary contributions of this paper are as follows: an active short circuit line method for measuring the volt-ampere characteristic curve of chaotic circuits is proposed for the first time. A memristor-based chaotic system is also constructed by using memristor as nonlinear term. Then, the active short circuit line method is applied to measure the volt-ampere characteristic curve of the corresponding memristor-based chaotic circuit.