Search results
1 – 2 of 2Kapil Bhardwaj and Mayank Srivastava
This paper aims to develop a mathematical model for four-lobe memristor (FLM) element. The four-lobe memristive behaviour can be used in realization of hyperchaotic oscillators…
Abstract
Purpose
This paper aims to develop a mathematical model for four-lobe memristor (FLM) element. The four-lobe memristive behaviour can be used in realization of hyperchaotic oscillators and implementation of multi-bit memories. For verification of the developed mathematical framework, two FLM circuit emulators have been presented using VDCC and IC LM13700, respectively.
Design/methodology/approach
A mathematical model for FLM has been developed in which, the condition for the existence of symmetrical four lobes, instances and coordinates of the end points of lobes has been derived and presented. Using this mathematical framework, a FLM emulator based on VDCC has been developed. To validate the possibility of practical implementation of FLM concept, an IC LM13700-based circuit has also been developed. The workability of VDCC based circuit has been verified by running simulations in PSPICE environment using CMOS VDCC model. Similarly, the behaviour of LM13700 IC-based circuit has been confirmed by SPICE model of LM13700 IC.
Findings
It has been shown mathematically that under certain conditions, third-order flux dependent equation of memductance can be used to generate four lobes on the transient v-i plane. Also, two FLM emulators without using any voltage multiplier circuit/IC have been reported.
Originality/value
From the best knowledge of the authors, there are no such FLM emulators that have been reported in literature so far, which operates at practical operating frequencies.
Details
Keywords
Kapil Bhardwaj and Mayank Srivastava
The purpose of the paper is to report an emulation configuration of a three pinch-off memristor (TPM), whose transient characteristics consist three cross-over points on the…
Abstract
Purpose
The purpose of the paper is to report an emulation configuration of a three pinch-off memristor (TPM), whose transient characteristics consist three cross-over points on the voltage-current plane, which is dissimilar to a conventional memristor. These characteristics can be very useful in memristor-based multi-bit memory devices and hyperchaotic oscillators.
Design/methodology/approach
The work describes the Mathematical framework for TPM and a circuit emulator based on the derived conditions. The configuration is based on five operational transconductance amplifier (OTAs) and four grounded passive elements. After which, we have verified its operation using personal simulation program with integrated circuit emphasis simulation environment. Finally, the implementation of OTA-based TPM using commercial integrated circuit (IC) LM13700 has also been presented.
Findings
It has been shown that a flux-dependent memductance expression of cubic order can show three intersections on the VI contour under certain parameter related constraints. Moreover, the OTA-based emulator reported in the work is very compact in nature because of the no use of external multiplier IC/circuitry, which has been popular in previous emulators.
Originality/value
For the first time, a multiple cross-over memristor emulator has been reported which can operate under practical operating conditions such as at practical operating frequencies and sinusoidal excitation.
Details