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The purpose of this paper is to investigate the morphology evolution and the composition transformation of Au-Sn intermetallic compounds (IMCs) of the new Au/Sn-5Sb-1Cu-0.1Ni-0.1Ag/(Au)Ni solder joint during the high temperature aging.

Sn-5Sb-1Cu-0.1Ni-0.1Ag solder balls (500 µm in diameter), heat sink with structure of 7.4 µm Au layer on 5 µm Ni-plated Cu alloy and Si chip with 5.16 µm plated Au were used to fabricate micro-solder joints. The joints were performed in a furnace at 150°C for 150, 250 and 350 h aging. The samples were polished and deep etched before analyzed by metallographic microscope and scanning electron microscopy, respectively. Energy dispersive x-ray spectroscopy was used to identify the composition of the IMCs.

ß-(Au,Ni,Cu)₁₀Sn phase is formed during the soldering process. The IMCs evolution has two periods during the aging. The first is the ξ-(Au,Ni,Cu)₅Sn, ξ-(Au,Cu)₅Sn and δ-AuSn were formed and grew to form a full-compound joint after about 150 h aging. The second is the conversion of the full-compound joint. The IMCs converted to ξ′ phase when the aging time extends to 250 h, and transformed to ε-(Au,Ni,Cu)Sn₂ and η-(Au,Ni,Cu)Sn₄ after 350 h aging. The thicker gold layer and thinner solder joint can promote the growth of the IMCs. ß-(Au,Ni,Cu)₁₀Sn emerged in Au/SnSb-CuNiAg/(Au)Ni in this research, which is not usually found.

The results in this study have a significant meaning for the application of the new Sn-5Sb-1Cu-0.1Ni-0.1Ag in harsh conditions.

This paper aims to identify a variety of binary system solders by alloying, and relevantly derive multiple system Pb-free solders from the former, attempting to replace the high temperature Sn-Pb solder.

The basis of the paper is the synthesis of previous studies. In terms of some binary high temperature solder alloys, such as Au-20Sn, Bi-2.5Ag, Sn-5Sb, Au-12.5Ge, Zn-6Al and Zn-Sn, taking the alloy phase diagram as the starting point, the melting characteristics, microstructure, mechanical properties, wetting ability and reliability of solder joint are analysed and the prospect is consequently indicated.

Based on the analysis of the six groups of Pb-free solders, the present binary system solder alloys, from the perspective of melting properties, mechanical properties, soldering or reliability of solder joint, rarely meet the comprehensive requirements of replacing the high-temperature Sn-Pb solder. It is assumed to be a solution that multiple-system Pb-free solders derive from a variety of binary system solders by means of alloying. The future development of high temperature Pb-free solder may focus on some factors such as physical properties, mechanical properties, processing, reliability of solder joint, environmental performance and expense.

The paper concentrates on the issue of Pb-free solders at high temperature. From a specific perspective of binary system solders, the presently available Pb-free solders are suggested from the starting point of the alloy phase diagram and the prospect of alternatives of Sn-Pb solders at high temperature are indicated.

Tape automated bonding (TAB) is a suitable technology for assembling ICs with a high number of l/Os. The gang bonding process usually applied requires increasing thermode forces for chips with high lead counts and narrow tolerances regarding thermode parallelism and planarity. Due to the high bonding pressure, TC bonding of Au bumps to Au‐plated tapes becomes critical for these applications. In order to avoid damage to the pad structure an inner lead bonding (ILB) process with reduced pressure is required. A tape metallisation of 0.5–1.0 µm Sn is not sufficient for a significant reduction of thermode pressure. As an alternative, the application of an eutectic Au‐Sn cushion which is deposited on top of the bumps is presented. A modified bumping process was developed for the deposition of the solder bumps. Soldering of the Au‐Sn bumps to a Au‐plated tape was performed successfully by two techniques: thermode gang bonding and laser soldering. Bond parameters and tin layer thickness were optimised. Reliability investigations by thermal ageing were performed. The special metallurgical aspects of the system were investigated with a microprobe.

The purpose of this paper is to investigate the effect of typical morphologies of Au-Sn IMCs (intermetallic compounds) at the interfaces of solder and pads on shear properties of laser reflowed micro-solder joints.

Sn-2.0Ag-0.75Cu-3.0Bi (SnAgCuBi) solder balls (120 μm in diameter), pads with 0.1, 0.5, 0.9 or 4.0 μm thickness of Au surface finish, and different laser input energies were utilized to fabricate micro-solder joints with Au-Sn IMCs having different typical morphologies. The joints were performed by a shear test through a DAGE bond test system. Fracture surfaces of the joints were analyzed by scanning electron microscopy and energy-dispersive X-ray spectrometry to identify fracture modes and locations.

Morphologies of Au-Sn IMCs would affect shear properties of the joints remarkably. When needle-like AuSn4 IMCs formed at the interfaces of solder and pads, almost entire surfaces presented the manner of ductile fracture. Moreover, shear forces of this kind of solder joints were higher than those of joints without Au-Sn IMCs or with a nearly continuous/continuous Au-Sn IMCs layer. The reason was that the shear performance of the solder joints with needle-like AuSn4 IMCs was enhanced by an interlocking effect between solder and needle-like AuSn4 IMCs. As a nearly continuous or continuous Au-Sn IMCs layer formed, the fracture surfaces presented more character of brittle than ductile fracture. However, if an Au layer still remained under Au-Sn IMCs, the shear performance of the joints would be enhanced.

The results in this study can be used to optimize microstructures and shear properties of laser reflowed micro-solder joints.

The reliability of chip‐on‐film (COF) packages is fundamentally dependent upon the quality of the eutectic Au‐Sn joint formed between the Au bumps on the integrated circuit (IC) device and the Sn‐plated Cu inner leads. Therefore, it is essential that an appropriate bonding temperature is achieved during the inner lead bonding (ILB) process. The purpose of this paper is to identify the optimal processing conditions which maximize the reliability of the Au‐Sn joints.

The paper commences by performing an experimental investigation to establish the temperature at three specific locations within the COF/ILB system in a typical gang‐bonding process. The relationship between the setting temperature of the bonding tool and the temperature of the tool surface is then calibrated using an off‐line experimental system. An ANSYS finite element (FE) model is then constructed to simulate the temperature distribution within the COF/ILB system under representative temperature conditions. The validity of the numerical model is confirmed by comparing the simulation results with the experimental temperature measurements. The FE model is then used in a 2³ factorial design process to evaluate the effect of the principal COF/ILB processing parameters, namely the contact area, the tool temperature and the stage temperature, on the temperature induced at the interface between the Au bumps on the IC chip and the Sn‐coated Cu leads on the polyimide film.

The results reveal that the interfacial bonding temperature is determined primarily by the stage temperature.

A regression analysis model is applied to the factorial design results to construct a COF/ILB design chart which enables the rapid identification of the stage and tool temperatures required to achieve the minimum feasible eutectic bonding temperature.

The reliability of solder joints and plated‐through‐hole (PTH) copper structure was investigated for 503 I/O interstitial pin grid array packages with two different pin diameters. Each package type was wave soldered to printed wiring boards having two different surface finishes and PTH sizes, by using the 63Sn–37Pb alloy. Accelerated thermal cycling with continuous monitoring was used in conjunction with metallographic analysis to determine reliability and to elucidate the failure threshold. The microstructural features and failure modes were found to be similar among the solder joints despite the physical differences. The measured solder joint fatigue lifetimes varied from 2450 to 3700 thermal cycles, depending on pin and PTH combinations. The reliability of PTH copper exceeded 4000 thermal cycles regardless of the PTH size. The solder joint fatigue results were used to predict the reliability under operating conditions.

The effect of gold (Au) on the reliability of 0.65 mm pitch surface mount solder joints between plastic quad flat packs and Cu‐Ni‐Au FR‐4 printed circuit boards was investigated. Cu‐Ni‐Au is a desirable printed circuit board finish for multi‐chip modules or printed circuit boards that would otherwise require a selective Au finish, for example for edge connectors or wire bondable parts. However, Au is known to embrittle solder when it is present in sufficiently high concentrations, creating a concern that solder joint fatigue life in service will also be adversely affected. This paper reports the results of mechanical shock, mechanical vibration and thermal cycling testing of fine pitch solder joints containing varying amounts of Au. Tests were performed on as‐soldered joints and on joints that had been heat‐treated to evolve the microstructure towards equilibrium. The tests were designed to accelerate in‐service conditions in a typical industrial environment. Under these conditions, the Au concentrations tested did not promote solder joint failures. Microstructural characterisation of the distribution and morphology of the Au‐, Ni‐ and Cu‐Sn intermetallics in the joint before and after accelerated testing was also performed. On the basis of these observations it is recommended that the Au concentration in solder joints between plastic quad flat packs and Cu‐Ni‐Au FR‐4 printed circuit boards not exceed 3.0 wt.%.

The choice of high pin count ASIC packages has a major impact on the total cost and performance of the whole packaging system. Six different types of ASIC packages have been compared with respect to production aspects, availability, reliability, thermal and electrical properties and cost. Recommendations for the proper choice of packages for different types of applications are given. All packages have been directly assembled to PWBs in order to study problems with handling, solder process, testing and repairability. Some of the assembled packages have been temperature cycled in order to test the solder joint reliability. The pin grid array packages are the most frequently used high pin count packages today. However, they are expensive and through‐hole mounting reduces the routing capability of the board. Pad area array packages are a hermetic alternative with a lower price for the package as well as very good thermal and electrical properties, but they need to be mounted on expensive PWBs. Another surface mountable package which is hermetic is the ceramic leaded chip carrier with fine lead pitch. This package is even more expensive than the pin grid array package and is difficult to handle. In the future, non‐hermetic alternatives will probably predominate. Plastic quad flat pack and TapePak can be used below 160–180 leads, while direct assembled TAB would be the best alternative for very high pin counts. Before one can use non‐hermetic packages in telecom products, a large qualification programme must be performed to evaluate the long‐term reliability.

Tape Automated Bonding (TAB) is a modern technology which meets the requirements for micro‐connecting VLSI circuits. The limitations for gang bonding chips with high lead counts and reduced pitches are increased bond forces and induced mechanical stress. Laser soldering is an alternative for such contacts. Because microjoining of surfaces occurs via thermal energy from the laser beam, no mechanical pressure is necessary. Due to the optical properties of the laser beam and the possibility to reduce the laser spot, soldering of small pitches is possible. The results of TAB inner lead bonding with a pulsed Nd:YAG laser are presented. Tapes with three metallisations (Sn, Ni‐Sn and Au) were laser soldered to bumps consisting of gold and gold‐tin. The pull strength of laser soldered TAB‐contacts was optimised by variation of laser power and reliability investigations were performed. The metallurgy of laser soldering is different and more critical to long term reliability than that of gang bonded ILB‐contacts, even if identical tape and bump materials are applied. An accumulation of eutectic 80/20 Au‐Sn solder in the bonded interface results in a strong degradation due to Kirkendall pore formation in the ternary Cu‐Sn‐Au system. The application of a tape with a diffusion barrier of Ni inhibits this effect. But during thermal ageing these contacts show a strong degradation of pull forces which is attributed to the formation of brittle intermetallic compounds of the elements Ni, Sn and Au in the contact area. Laser soldering of Au‐plated tapes to Au‐Sn solder bumps is possible. The contacts show optimal pull forces and a minimal degradation after thermal ageing. This is attributed to the formation of an intermetallic compound with a high stability. The Zeta phase acts as a diffusion barrier between the copper lead and the eutectic Au‐Sn solder.

This study aims to investigate the interfacial microstructures of ultrasonic-assisted solder joints at different soldering times.

Solder joints with different microstructures are obtained by ultrasonic-assisted soldering. To analyze the effect of ultrasounds on Cu₆Sn₅ growth during the solid–liquid reaction stage, the interconnection heights of solder joints are increased from 30 to 50 μm.

Scallop-like Cu₆Sn₅ nucleate and grow along the Cu₆Sn₅/Cu₃Sn interface under the traditional soldering process. By comparison, some Cu₆Sn₅ are formed at Cu₆Sn₅/Cu₃Sn interface and some Cu₆Sn₅ are randomly distributed in Sn when ultrasonic-assisted soldering process is used. The reason for the formation of non-interfacial Cu₆Sn₅ has to do with the shock waves and micro-jets produced by ultrasonic treatment, which leads to separation of some Cu₆Sn₅ from the interfacial Cu₆Sn₅ to form non-interfacial Cu₆Sn₅. The local high pressure generated by the ultrasounds promotes the heterogeneous nucleation and growth of Cu₆Sn₅. Also, some branch-like Cu₃Sn formed at Cu₆Sn₅/Cu₃Sn interface render the interfacial Cu₃Sn in ultrasonic-assisted solder joints present a different morphology from the wave-like or planar-like Cu₃Sn in conventional soldering joints. Meanwhile, some non-interfacial Cu₃Sn are present in non-interfacial Cu₆Sn₅ due to reaction of Cu atoms in liquid Sn with non-interfacial Cu₆Sn₅ to form non-interfacial Cu₃Sn. Overall, full Cu₃Sn solder joints are obtained at ultrasonic times of 60 s.

The obtained microstructure evolutions of ultrasonic-assisted solder joints in this paper are different from those reported in previous studies. Based on these differences, the effects of ultrasounds on the formation of non-interfacial IMCs and growth of interfacial IMCs are systematically analyzed by comparing with the traditional soldering process.