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The relentless drive towards greater complexity and interconnection density on silicon integrated circuit (SIC) devices is leading to a reappraisal of techniques for making electrical connections from the SIC to the next level of packaging. The techniques being examined include fine pitch Wire Bonding, Tape Automated Bonding (TAB) and Flip‐chip Solder Bonding. This latter technique forms the subject of this paper. The history of flip‐chip solder bonding technology is briefly reviewed and metallurgical, physical and mechanical aspects of the bonding process and of the resulting joints are discussed. The merits of the flip‐chip bonding process are indicated and applications examples presented. Particular attention is given to the fabrication of a novel pyroelectric‐SIC thermal imaging sensor using flip‐chip solder bonding.

This paper aims to demonstrate low-temperature bonding for piezoelectric materials at temperatures well below the relevant Curie temperatures so as to avoid depolarization of the piezoelectric material during bonding.

Au-coated test samples of lead zirconate titanate (PZT) are bonded to a WC-based resonant backing layer with In–Bi eutectic material in which the In–Bi metal system is a preform or thin, evaporated layers. The bonded samples are characterized using electrical impedance spectroscopy and cross-section microscopy. The first technique verifies the integrity of polarization and reveals the quality of the bondline in a non-destructive manner, particularly looking for voids and delaminations. The latter technique is destructive but gives more precise information and an overview of the structure.

Successful low-temperature (115°C) bonding with intact PZT polarization was demonstrated. The bondlines show a layered structure of Au/Au–In intermetallic compounds (with Bi inclusions)/Au, capable of withstanding temperatures as high as 271°C before remelting occurs. For bonded samples using In–Bi preform, repeatable bonds of high quality (very little voiding) were obtained, but the bonding time is long (1 h or more). For bonded samples using evaporated thin films of In–Bi, bonding can be performed in 30 min, but the process needs further optimization to be repeatable.

Low-temperature solid-liquid interdiffusion (SLID) bonding is a novel technique, merging the fields of low-temperature solder bonding with the SLID/transient liquid phase (TLP) approach, which is normally used for much higher temperatures.

Selection of the correct interconnection technique for high lead count integrated circuits is dependent on technical and economic factors, in particular in small batch production of application specific devices (ASICs). This paper reviews some of the interconnection options and describes work where some advances in high density interconnection have been made.

Although wire‐bonding is an established and well‐known technique for micro‐joining on leadframes, direct die‐attach without housing on printed circuit boards has some new requirements for the surface of the bond pads and the PCB itself. The best choice of material for the bond pads is a pure gold metallisation. The quality of the surface can be tested during wire‐bonding using the ultrasonic‐power process window. It will be shown that the surface and the PCB itself have a considerable influence on the ultrasonic and thermosonic bonding process.

Optimization of the process parameters remains a challenging task in thermosonic wire bonding due to relatively poor understanding of the bonding mechanism. The purpose of this paper is to understand initial bond formation in thermosonic gold wire bonding on aluminium metallization pads and the effect of bonding time on the initiation of bonding.

A gold wire (20 μm diameter/99.99 per cent wt%) was bonded to aluminium metallization pads (1 μm thick) on a silicon chip using a commercial ball/wedge automatic bonder. Bonding parameters were selected specifically to produce underdeveloped ball bonds so that ball lift‐off occurred during looping process. The lift‐off footprints on the aluminium metallization pads and their evolution were carried out using optical microscopy and scanning electron microscopy. A model is proposed to elaborate the effect of bonding time on initiation of bonding.

The obtained results showed that metallurgical bonding initiated at the peripheral areas of the contact area situated along the direction of ultrasonic vibration. Those areas extended inwards with bonding time, eventually covering the entire contact area.

This paper describes how bond initiation and its evolution in thermosonic gold wire bonding on aluminium metallization is ascertained by observing lift‐off footprints. The understanding of bonding mechanism benefits the optimization of process parameters and improvement of bondability in thermosonic wire bonding.

An evaluation of the feasibility of copper ball‐wedge bonding on Au, Cu thick film and aluminium metallisations was carried out. This evaluation is not merely a check for feasibility, but will also give more insight into the problems concerning copper ball‐wedge bonding. This article does not pretend to represent profound research on copper ball bonding, but will give qualitative insight. Copper ball bonding, without using cover gas, is possible, but the bond quality decreases. Extrusion and penetration of the ball bond in the substrates are caused by the hardness of the copper. This can only be avoided when the hardness of the substrate is matched to the hardness of the copper ball/wire. Bonding mechanisms are similar for bonding on thick film to those for bonding on metallisations. Matching hardness of the substrate to the ball/wire seems to be a necessity for proper ball‐wedge bonding.

GaAs electronic devices are becoming increasingly used in the microelectronics industry especially in solid state microwave, ultra high speed digital processing and optoelectronic applications. However, in the manufacture of the GaAs devices, problems due to the inherent brittleness of the GaAs and batch to batch variability of the bond pad metallisation have commonly been experienced. This has resulted in some difficulties in wire bonding to GaAs devices with ultrasonic and thermocompression wire bonding techniques. This paper describes a programme undertaken to investigate Au wire bonding techniques to GaAs devices. Specifically, bonding trials have been performed on a range of GaAs substrates using pulse tip and continuously heated thermocompression bonding and ultrasonic bonding. The results of this work have shown that thermocompression and ultrasonic wire bonding techniques are cabable of producing acceptable bonds to GaAs devices, although some of the advantages and limitations of each technique have been demonstrated. Thermocompression bonding with a continuously heated capillary gave the most tolerant envelope of bonding conditions and highest bond strengths. Pulse tip thermocompression bonding gave a less tolerant envelope of acceptable bonding conditions, required a longer bonding time and the wire was weakened above the ball bond. Ultrasonic bonding did not require any substrate heating to give acceptable bonds. However, the choice of equipment can be critical if damage to the device is to be avoided.

The aim of the paper is to study the feasibility of direct ultrasonic bonding between contact pad arrays on flexible printed circuit boards (FPCB) and rigid printed circuit boards (RPCB) at ambient temperature.

Metallization layers on the RPCB comprised Sn on Cu while the pads on the FPCB consisted of Au/Ni/Cu. Prepared RPCB and FPCB were bonded by ultrasound at ambient temperature using an ultrasonic frequency of 20 kHz, a power of 1,400 W, and 0.62 MPa of bonding pressure. The bonded samples were cross‐sectioned and the joints and microstructures were observed by Field Emission Scanning Electron Microscopy (FE‐SEM) and Energy Dispersive Spectroscopy (EDS). The soundness of the joints was evaluated by pull testing.

Robust bonding between FPCB and RPCB was obtained by bonding for 1.0 and 1.5 s. This result has confirmed that direct room temperature ultrasonic bonding of Au and Sn is feasible. At a longer bonding time of 3.0 s, cracks and voids were found in the joints due to excessive ultrasonic energy. The IMC (intermetallic compound) between the Sn layer and pads of the RPCB was confirmed as Cu₆Sn₅. On the FPCB side, Cu₆Sn₅ and Ni₃Sn₄ were formed by contact with the facing Sn coating, and mechanically alloyed Cu_0.81Ni_0.19 was found within the pads. Meanwhile, the strength of bonded joints between FPCB and RPCB increased with bonding time up to 1.5 s and the maximum value reached 12.48 N. At 3.0 s bonding time, the strength decreased drastically, and showed 5.75 N. Footprints from the fracture surfaces showed that bonding started from the edges of the metal pads, and extended to the pad centers as ultrasonic bonding time was increased.

Direct ultrasonic bonding with transverse vibration at ambient temperature between the surface layers of the pads of FPCB and RPCB has been confirmed to be feasible.

Flip chip assembly using anisotropic conductive adhesives offers an interesting alternative for making high‐density interconnections. The use of conventional organic printed circuit boards makes this technique even more attractive. However, a low‐cost adhesive flip chip bonding process will require a reduced bonding cycle time or the use of multi‐head joining equipment. Adhesive flip chip bonding is characterized by a long bonding cycle time due to the relatively long curing time of adhesives and the need for simultaneous application of pressure during the curing process. In soldered flip chip techniques, the bonding time per assembly is shorter, because all the chips on the substrate can be soldered in a reflow oven at the same time. In this study, the minimum pre‐curing time needed to make a reliable adhesive joint was determined using one commercial anisotropic conductive adhesive film used on FR‐4 substrates. The results are promising, since bonding time reduction from 40 s to 10 s does not reduce the joint reliability.

Ball‐bumping is a flexible low cost bumping technology based on the conventional wire bonding procedure. It is applicable to single chips or whole wafers as well as to substrates. As established wire‐bonding machines can be used, expensive bumping‐process equipment for phototooling and plating is not necessary. Flip‐chip bonding is the most advantageous attach method of high frequency applications. Compared with wire‐bonding and TAB it allows the highest contact density, the shortest signal paths and lowest interconnection parasitics. The reduced pad sizes and pitches, not only of GaAs devices, demand a well controlled bump deformation during flip‐chip bonding. This work develops process parameters for the flip‐chip bonding of silicon and GaAs devices with respect to the best interconnection result by lowest bonding force and ball‐bump deformation. Ball‐bumps with diameters of 50 and 80 urn (2.0 and 3.2 mils) were created using 98% AuPd bump wire with diameters of 18 µm (0.7 mil) and 25 µm (1.0 mil) respectively. Ball‐bumping with a minimal pitch of 70 µm (2.8 mils) has been achieved. A special preparation allowed the shear test investigation of each bump/pad interface after flip‐chip attach. Bonding forces of 20 and 25 cN/bump respectively lead to a good welding in the bump/substrate interface due to the special shape of ball‐bumps. For silicon devices which have a pad metallisation of aluminium, the shear forces of the bump/pad interface increase after flip‐chip bonding, too. No cratering of GaAs and silicon occurs after flip‐chip bonding due to a low bonding force ramp of 5 cN/s and 10 cN/s respectively. The flip‐chip attach of a Fujitsu FLR 016 GaAs‐FET which has pad sizes of 35 urn is demonstrated. In this case, substrate bumping is the more advantageous bumping method. The feasibility of fine‐pitch TAB attach using ball‐bumps is introduced. 100 µm (3.9 mils) pitch silicon devices with 328 pads were ball‐bumped for both solder and thermal‐compression TAB. Bond forces were in the range of 9–11 cN/bump and 15–21 cN/bump respectively. Pull forces of approximately 30 cN/lead show good results of the bump/lead interconnection after TAB.