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These implementations not only generate excessive voltage levels to enhance the quality of power but also include a detailed investigating of the various modulation methods and control schemes for multilevel inverter (MLI) topologies. Reduced harmonic modulation technology is used to produce 11-level output voltage with the production of renewable energy applications. The simulation is done in the MATLAB/Simulink for 11-level symmetric MLI and is correlated with the conventional inverter design.

This paper is focused on investigating the different types of asymmetric, symmetric and hybrid topologies and control methods used for the modular multilevel inverter (MMI) operation. Classical MLI configurations are affected by performance issues such as poor power quality, uneconomic structure and low efficiency.

The variations in both carrier and reference signals and their performance are analyzed for the proposed inverter topologies. The simulation result compares unipolar and bipolar pulse-width modulation (PWM) techniques with total harmonic distortion (THD) results. The solar-fed 11-level MMI is controlled using various modulation strategies, which are connected to marine emergency lighting loads. Various modulation techniques are used to control the solar-fed 11-level MMI, which is connected to marine emergency lighting loads. The entire hardware system is controlled by using SPARTAN 3A field programmable gate array (FPGA) board and the least harmonics are obtained by improving the power quality.

The simulation result compares unipolar and bipolar PWM techniques with THD results. Various modulation techniques are used to control the solar-fed 11-level MMI, which is connected to marine emergency lighting loads. The entire hardware system is controlled by a SPARTAN 3A field programmable gate array (FPGA) board, and the power quality is improved to achieve the lowest harmonics possible.

The purpose of this paper is to design a cascaded Multilevel inverter with reduce number of switches for high power applications. This paper came up with an innovative three-phase multilevel inverter (MLI) topology, which is a cascaded structure based on classical three-legged voltage source inverter (VSI) bridges as an individual module. The prominent advantage of this topology is that it requires only one direct current (DC) link system. The main characteristic of it is that a higher number of voltage levels can be achieved with considerably a smaller number of semiconductor switches, which improves the reliability, power quality, cost and size of the system significantly.

The individual modules are cascaded through three-phase transformers to provide higher voltage at the output with the higher number of voltage levels. In this work, the phase-shifted pulse width modulation technique is implemented to verify the result.

The proposed topology is compared with three-phase cascaded H-bridge MLI (CHB-MLI) and a modified CHB-MLI topology and found better in many aspects. The proposed MLI can produce a higher number of voltage levels with fewer semiconductor switches and associated triggering circuitry. As the device count in the proposed MLI is less compared to other MLI discussed, it tends to have less switching and conduction loss which increases the efficiency and reliability. As the number of level increases, the voltage profile and the total harmonic distortion of the proposed MLI improves.

This is a transformer-based modular cascaded MLI, which is based on classical VSI bridges. Here in this topology, a single module provides all three phases. So, a single string of cascaded modules is enough for three-phase multilevel voltage generation.

Multilevel inverters (MLIs) have been studied widely over the past two decades because of their inherent advantages and interesting features. However, most of the newly introduced structures suffer from the increased standing voltage of the switches, which is defined as the maximum off-state voltage on the switches, losing modularity and increased number of direct current (DC) voltage sources. The purpose of this study is to propose a new hybrid MLI topology to alleviate the mentioned problems.

The proposed approach in this study includes using the advantage of two different topologies and combine them in a way that the advantages of both of the topologies are achieved. Therefore, the approach is to design a hybrid topology from two existing topologies so that a new topology has resulted.

This paper proposes a new hybrid MLI with lower power electronic switches and lowers DC voltage sources in comparison with the classic structures. The proposed MLIs maintain a balance between the number of switches, the standing voltage on the switches and the number of DC sources. The topology description, modulation method and comparative study have been presented. Also, another more reduced structure is presented for higher power factor operation. The MATLAB simulation and experimental results of a nine-level inverter have been presented to verify its operation.

The hybrid topology has a new structure that has not been presented before. It is important to emphasize that the topology combination and achieving the hybrid topology is wisely accomplished to improve some features of the MLI.

Multilevel inverters become very popular in medium voltage applications owing to their inherent capability of reconciling stepped voltage waveform with reduced harmonic distortion and electromagnetic interference. They have several disadvantages like more number of switching devices required and devices with high voltage blocking and need additional dc sources count to engender particular voltage. So this paper aims to propose a novel tri-source symmetric cascaded multilevel inverter topology with reduced number of switching components and dc sources.

A novel multilevel inverter has been suggested in this study, offering minimal switch count in the conduction channel for the desired voltage level under symmetric and asymmetric configurations. This novel topology is optimized to prompt enormous output voltage levels by employing constant power switches count and/or dc sources of voltage. The topology claims its advantages in generating higher voltage levels with lesser number of voltage sources, gate drivers and dc voltage sources.

The consummation of the proposed arrangement is verified in Matlab/Simulink R2015b, and an experimental prototype for 7-level, 13-level, 21-level, 29-level, 25-level and 49-level operation modes is constructed to validate the simulation results.

The proposed topology operated with six new algorithms for asymmetrical configuration to propel increased number of voltage levels with reduced power components.

Multilevel inverter (MLI) is a prevailing sensible alternative to two-level inverters that offer a high-quality output voltage waveform, wherein the multiple input direct current (DC) levels are established by using isolated DC sources, batteries and renewable energy sources. The purpose of this paper is to develop MLI to offer lower total harmonic distortion (THD), higher output voltage levels and reduced switching components for high power applications.

In this paper, a new tapped sources stack succored modified HX bridge MLI (TSSSMHXBMLI) topology is proposed which includes two modules, such as tapped sources stack (TSS) and modified HX bridge inverter, which perform their function in a single stage. Also, this paper outlines the formulaic implementation of the multicarrier/sub-harmonic pulse width modulation (MCPWM/SHPWM) in a Xilinx Spartan3E-500 field programmable gate array (FPGA) is suitable for the developed MLI.

The feasibility of the suggested topology is well proved by both simulation and experiment results.

This paper examines a new topology of TSSSMHXBMLI with a view to minimize total count of switching components against basic MLI topologies. The operating sequence of the suggested TSSSMHXBMLI topology is verified with the simulation study followed by an experimental investigation.

The simulation and experimental results of suggested MLI topology reveals to obtain lower THD, higher output voltage levels and reduced switching components for high power applications.

Multilevel inverters play a major role in the development of high-power industrial applications. In traditional low-level inverters (e.g. 2-level), the switching frequency is restricted and the harmonic spectrum of the system is hard to meet power requirements. Similarly, high-level inverters consist of a large number of switches, complex modulation techniques and complex hardware architecture, which results in high power loss and a significant amount of harmonic distortion. Furthermore, it is a must to ensure that every switch experiences the same stress of voltage and current. The purpose of this paper is to present an inverter topology with lower conduction and switching losses via reduced number of switches and equal voltage source-sharing technique.

Herein, the authors present a cascaded multilevel inverter having less power switches, a simple modulation technique and an equal voltage source-sharing phenomenon implementation.

The modulation technique becomes more complex when equal voltage source-sharing is to be implemented. In this study, a novel topology for the multilevel inverter with fewer switches, novel modulation technique, equal voltage source-sharing and Inductor-Capacitor-Inductor filter implementation is demonstrated to the reduce harmonic spectrum and power losses of the proposed system.

The nine-level inverter design is validated using software simulations and hardware prototype testing; the power losses of the proposed inverter design are elaborated and compared with the traditional approach.

Multilevel inverter (MLI) is an established design approach for inverter applications in medium-voltage and high-voltage range of applications. An asymmetric design synthesizes multiple DC input voltage sources of unequal magnitudes to generate a high-quality staircase sinewave comprising a large number of steps or levels. However, the implications of using sources of unequal magnitudes results in the requirements of a large variety of inverter switches and higher magnitudes of the total blocking voltage (TBV) rating of the inverter, which increase the cost. The purpose of this study is to present a solution based on algorithms for establishing DC source magnitudes and other design parameters.

The approach used in this study is to develop algorithms that bring an asymmetric cascaded MLI (ACMLI) design close to symmetric design. This approach then reduces the variety of switch ratings and minimizes the TBV of the inverter. Thus, the benefits of both asymmetric design (generation of a large number of voltage levels in the output waveform) and symmetric design (modularity) are achieved. The proposed algorithms can be applied to a number of ACMLI topologies, including classical cascaded H-bridge (CHB). The effectiveness of the proposed algorithms is validated by simulation in Matlab-Simulink and experimental setup.

Two new algorithms are proposed that reduce the number of variety of switches to just three. The variety can further be reduced to two under a specified condition. The algorithms are compared with the existing ones, and the results are promising in minimizing the TBV rating of the inverter, which results in cost reduction as well. For a specific case of four CHBs, the proposed Algorithm-1 produced 27% and Algorithm-2 produced 53% higher levels. Moreover, the presented algorithms produced minimum values of the TBV and resulted in minimum cost of inverter.

The proposed algorithms are novel in structure and have achieved the targeted values of minimized switch variety and reduced TBV ratings. Due to less variety, the inverter achieves a near symmetric design, which enables to attain the added advantages of modularity and reduced difference of power sharing among the DC sources.

This paper aims to examine the design and control of a symmetric multilevel inverter (MLI) using grey wolf optimization and differential evolution algorithms.

The optimal modulation index along with the switching angles are calculated for an 11 level inverter. Harmonics are used to estimate the quality of output voltage and measuring the improvement of the power quality.

The simulation is carried out in MATLAB/Simulink for 11 levels of symmetric MLI and compared with the conventional inverter design. A solar photovoltaic array-based experimental setup is considered to provide the input for symmetric MLI. Field Programmable Gate Array (FPGA) based controller is used to provide the switching pulses for the inverter switches.

Attempted to develop a system with different optimization techniques.

The active power filter with two-level inverter needs a high-rating coupling transformer for high-power applications. This complicates the control and system becomes bulky and expensive. The purpose of this paper is to motivate the use of multilevel inverter as harmonic filter, which eliminates the coupling transformer and allows direct control of the power circuit. The advancement in artificial intelligence (AI) for computation is explored for controller design.

The proposed scheme has a five-level cascaded H-bridge multilevel inverter (CHBMLI) as a harmonic filter. The control scheme includes one neural network controller and two fuzzy logic-based controllers for harmonic extraction, dc capacitor voltage balancing, and compensating current adjustment, respectively. The topology is modeled in MATLAB/SIMULINK and implemented using dSPACE DS1103 interface for experimentation.

The exhaustive simulation and experimental results demonstrate the robustness and effectiveness of the proposed topology and controllers for harmonic minimization for RL/RC load and change in load. The comparison between traditional PI controller and proposed AI-based controller is presented. It indicates that the AI-based controller is fast, dynamic, and adaptive to accommodate the changes in load. The total harmonic distortion obtained by applying AI-based controllers are well within the IEEE519 std. limits.

The simulation of high-power, medium-voltage system is presented and a downscaled prototype is designed and developed for implementation. The laboratory module of CHBMLI-based harmonic filter and AI-based controllers modeled in SIMULINK is executed using dSPACE DS1103 interface through real time workshop.

Traditional level inverter technology has drawbacks in the aspect of Total harmonic distortion (THD) and switching losses for higher frequencies. Due to these drawbacks, two-level inverters have become unprofitable for high-power applications. Multilevel inverters (MLIs) are used to enhance the output waveform characteristics (i.e. low THD) and to offer various inverter topologies and switching methods.

MLIs are upgraded versions of two-level inverters that offer more output levels in current and voltage waveforms while lowering the dv/dt and di/dt ratios. This paper aims to review and compare the different topologies of MLI used in high-power applications. Single and multisource MLI's working principal and switching states for each topology are demonstrated and compared. A Simulink model system integrated using detailed circuit simulations in developed in MATLAB®–Simulink program. In this system, a constant voltage source connected to MLI to feed asynchronous motor with squirrel cage rotor type is used to demonstrate the efficacy of the MLI under different varying speed and torque conditions.

MLI has presented better control and good range of system parameters than two-level inverter. It is suggested that the MLIs like cascade-five-level and NPC-five-level have shown low current harmonics of around 0.43% and 1.87%, respectively, compared to two-level inverter showing 5.82%.

This study is the first of its kind comparing the different topologies of single and multisource MLIs. This study suggests that the MLIs are more suitable for high-power applications.