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High packaging density in the present VLSI era builds an acute power crisis, which limits the use of MOSFET device as a constituent block in CMOS technology. This leads researchers in looking for alternative devices, which can replace the MOSFET in CMOS VLSI logic design. In a quest for alternative devices, tunnel field effect transistor emerged as a potential alternative in recent times. The purpose of this study is to enhance the performances of the proposed device structure and make it compatible with circuit implementation. Finally, the performances of that circuit are compared with CMOS circuit and a comparative study is made to find the superiority of the proposed circuit with respect to conventional CMOS circuit.

Silicon–germanium heterostructure is currently one of the most promising architectures for semiconductor devices such as tunnel field effect transistor. Analytical modeling is computed and programmed with MATLAB software. Two-dimensional device simulation is performed by using Silvaco TCAD (ATLAS). The modeled results are validated through the ATLAS simulation data. Therefore, an inverter circuit is implemented with the proposed device. The circuit is simulated with the Tanner EDA tool to evaluate its performances.

The proposed optimized device geometry delivers exceptionally low OFF current (order of 10^−18 A/um), fairly high ON current (5x10^−5 A/um) and a steep subthreshold slope (20 mV/decade) followed by excellent ON–OFF current ratio (order of 10^13) compared to the similar kind of heterostructures. With a very low threshold voltage, even lesser than 0.1 V, the proposed device emerged as a good replacement of MOSFET in CMOS-like digital circuits. Hence, the device is implemented to construct a resistive inverter to study the circuit performances. The resistive inverter circuit is compared with a resistive CMOS inverter circuit. Both the circuit performances are analyzed and compared in terms of power dissipation, propagation delay and power-delay product. The outcomes of the experiments prove that the performance matrices of heterojunction Tunnel FET (HTFET)-based inverter are way ahead of that of CMOS-based inverter.

Germanium–silicon HTFET with stack gate oxide is analytically modeled and optimized in terms of performance matrices. The device performances are appreciable in comparison with the device structures published in contemporary literature. CMOS-like resistive inverter circuit, implemented with this proposed device, performs well and outruns the circuit performances of the conventional CMOS circuit at 45-nm technological node.

Adoption of integrated MOS based pseudo-resistor (PR) structures instead of using off-chip passive poly resistors for analog circuits in complementary metal oxide semiconductor technology (CMOS) is an area-efficient way for realizing larger time constants. However, issue of common-mode voltage shifting and excess dependency on the process and temperature variations introduce nonlinearity in such structures. So there is dire need to not only closely look for the origin of the problem with the help of a thorough mathematical analysis but also suggest the most suitable PR structure for the purpose catering broadly to biomedical analog circuit applications.

In this work, incremental resistance (IR) expressions and IR range for balanced PR (BPR) structures operating in the subthreshold region have been closely analyzed for broader range of process-voltage-temperature variations. All the post-layout simulations have been obtained using BSIM3V3 device models in 0.18 µm standard CMOS process.

The obtained results show that the pertinent problem of common-mode voltage shifting in such PR structures is completely resolved in scaled gate linearization and bulk-driven quasi-floating gate (BDQFG) BPR structures. Among all BPR structures, BDQFG BPR remarkably shows constant IR value of 1 TΩ over −1 V to 1 V voltage swing for wider process and temperature variations.

Various balanced PR design techniques reported in this work will help the research community in implementing larger time constants for analog-mixed signal circuits.

The PR design techniques presented in the present piece of work is expected to be used in developing tunable and accurate biomedical prosthetics.

The BPR structures thoroughly analyzed and reported in this work may be useful in the design of analog circuits specifically for applications such as neural signal recording, cardiac electrical impedance tomography and other low-frequency biomedical applications.

Dielectric barrier discharge (DBD) is widely used in the treatment of skin disease, surface modification of material and other fields of electronics. The purpose of this paper is to design a high-performance power supply with a compact structure for excimer lamps in electronics application.

To design a high-performance power supply with a compact structure remains a challenge for excimer lamps in electronics application, a current-source type power supply in a single stage with power factor correction (PFC) is proposed. It consists of an excitation voltage generation unit and a PFC unit. By planning the modes of the excitation voltage generation unit, a bipolar pulse excitation voltage with a high rising and falling rate is generated. And a high power factor (PF) on the AC side is achieved by the interaction of a non-controlled rectifier and two inductors.

The experimental results show that not only a high-frequency and high-voltage bipolar pulse excitation voltage with a high average rising and falling rate (7.51GV/s) is generated, but also a high PF (0.992) and a low total harmonic distortion (5.54%) is obtained. Besides, the soft-switching of all power switches is realized. Compared with the sinusoidal excitation power supply and the current-source power supply, the proposed power supply in this paper can take advantage of the potential of excimer lamps.

A new high-performance power supply with a compact structure for DBD type excimer lamps is proposed. The proposed power supply can work stably in a wide range of frequencies, and the smooth regulation of the discharge power of the excimer lamp can be achieved by changing the switching frequency. The ideal excitation can be generated, and the soft switching can be realized. These features make this power supply a key player in the outstanding performance of the DBD excimer lamps application.

High throughput and power efficient computing devices are highly essential in many autonomous system-based applications. Since the computational power keeps on increasing in recent years, it is necessary to develop energy efficient static RAM (SRAM) memories with high speed. Nowadays, Static Random-Access Memory cells are predominantly liable to soft errors due to the serious charge which is crucial to trouble a cell because of fewer noise margins, short supply voltages and lesser node capacitances.

Power efficient SRAM design is a major task for improving computing abilities of autonomous systems. In this research, instability is considered as a major issue present in the design of SRAM. Therefore, to eliminate soft errors and balance leakage instability problems, a signal noise margin (SNM) through the level shifter circuit is proposed.

Bias Temperature Instabilities (BTI) are considered as the primary technology for recently combined devices to reduce degradation. The proposed level shifter-based 6T SRAM achieves better results in terms of delay, power and SNM when compared with existing 6T devices and this 6T SRAM-BTI with 7 nm technology is also applicable for low power portable healthcare applications. In biomedical applications, Body Area Networks (BANs) require the power-efficient SRAM design to extend the battery life of BAN sensor nodes.

The proposed method focuses on high speed and power efficient SRAM design for smart ubiquitous sensors. The effect of BTI is almost eliminated in the proposed design.

The primary aim of this paper is to present a novel design approach for a ring voltage-controlled oscillator (VCO) suitable for L-band applications, whose oscillation frequency is less sensitive to power supply variations. In a few decades, with the advancement of modern wireless communication equipment, there has been an increasing demand for low-power and robust communication systems for longer battery life. A sudden drop in power significantly affects the performance of the VCO. Supply insensitive circuit design is the backbone of uninterrupted VCO performance. Because of their important roles in a variety of applications, VCOs and phase locked loops (PLLs) have been the subject of significant research for decades. For a few decades, the VCO has been one of the major components used to provide a local frequency signal to the PLL.

First, this paper chose to present recent developments on implemented techniques of ring VCO design for various applications. A complementary metal oxide semiconductor (CMOS)-based supply compensation technique is presented, which aims to reduce the change in oscillation frequency with the supply. The proposed circuit is designed and simulated on Cadence Virtuoso in 0.18 µm CMOS process under 1.8 V power supply. Active differential configuration with a cross-coupled NMOS structure is designed, which eliminates losses and negates supply noise. The proposed VCO is designed for excellent performance in many areas, including the L-band microwave frequency range, supply sensitivity, occupied area, power consumption and phase noise.

This work provides the complete design aspect of a novel ring VCO design for the L-band frequency range, low phase noise, low occupied area and low power applications. The maximum value of the supply sensitivity for the proposed ring VCO is 1.31, which is achieved by changing the VDD by ±0.5%. A tuning frequency range of 1.47–1.81 GHz is achieved, which falls within the L-band frequency range. This frequency range is achieved by varying the control voltage from 0.0 to 0.8 V, which shows that the proposed ring VCO is also suitable for low voltage regions. The total power consumed by the proposed ring VCO is 14.70 mW, a remarkably low value using this large transistor count. The achievable value of phase noise is −88.76 dBc/Hz @ 1 MHz offset frequency, which is a relatively small value. The performance of the proposed ring VCO is also evaluated by the figure of merit, achieving −163.13 dBc/Hz, which assures the specificity of the proposed design. The process and temperature variation simulations also validate the proposed design. The proposed oscillator occupied an extremely small area of only 0.00019 mm² compared to contemporary designs.

The proposed CMOS-based supply compensation method is a unique design with the size and other parameters of the components used. All the data and results obtained show its originality in comparison with other designs. The obtained results are preserved to the fullest extent.

The purpose of this paper through the redundant monitoring unit reflecting the real-time temperature change of the array, an adaptive refresh circuit based on temperature is designed.

This paper proposed a circuit design for temperature-adaptive refresh with a fixed refresh frequency of traditional memory, high refresh power consumption at low temperature and low refresh frequency at high temperature.

Adding a metal oxide semiconductor (MOS) redundancy monitoring unit consistent with the storage unit to the storage bank can monitor the temperature change of the storage bank in real time, so that temperature-based memory adaptive refresh can be implemented.

According to the characteristics that the data holding time of dynamic random access memory storage unit decreases with the increase of temperature, a MOS redundant monitoring unit which is consistent with the storage unit is added to the storage array with the 2T storage unit as the core.

The purpose of this paper aims to design a robust wind turbine emulator (WTE) based on a three-phase induction motor (3PIM).

The 3PIM is driven by a soft voltage source inverter (VSI) controlled by a specific space vector modulation. By adjusting the appropriate vector sequence selection, the desired VSI output voltage allows a real wind turbine speed emulation in the laboratory, taking into account the wind profile, static and dynamic behaviors and parametric variations for theoretical and then experimental analysis. A Mexican hat profile and a sinusoidal profile are therefore used as the wind speed system input to highlight the electrical, mechanical and electromagnetic system response.

The simulation results, based on relative error data, show that the proposed reactive power control method effectively estimates the flux and the rotor time constant, thus ensuring an accurate trajectory tracking of the wind speed for the wind emulation application.

The proposed architecture achieves its results through the use of mathematical theory and WTE topology combine with an online adaptive estimator and Lyapunov stability adaptation control methods. These approaches are particularly relevant for low-cost or low-power alternative current (AC) motor drives in the field of renewable energy emulation. It has the advantage of eliminating the need for expensive and unreliable position transducers, thereby increasing the emulator drive life. A comparative analysis was also carried out to highlight the online adaptive estimator fast response time and accuracy.

At the beginning of the 21st century, a new class of information workers, the “information have-less” has risen. This class of workers alleviates the influence of information and communication technologies (ICTs) revolution on poverty and unemployment. The purpose of this study is to investigate the presence of this class of workers in Egypt and assess the size and potential growth of this category of workers.

The study clarifies the conceptual framework of the new division of labor, in the information age. The Central Agency for Public Mobilization and Statistics, American Chamber of Commerce in Egypt, Ministry of Communications and Information Technology and Information and Decision Support Center websites provided secondary data for this study. These data are used to assess the size of “the information have less” in Egypt.

The division of work and class, in the 21st century, depends on the level of skills possessed to work with ICTs. So, class and labor nowadays could be divided into self-programmable labor (Innovators). Information have-less labor class, adding value to the economy by learning skills and presenting repetitive work. Generic labor class, who cannot work with ICTs, and work in jobs, that do not need computers or other ICTs. The study has shown that the “information have-less” labor class is present in Egypt since the beginning of the 21st century, in all its categories; entrepreneurism, the service sector and the manufacturing sector. There are approximately 50% of this labor class in the service sector and only 13% of the information have-less works in manufacturing sector despite the great opportunities that Egypt has to expand manufacturing to absorb more employment. The inclusion of information technology (IT), in all domains, has not decreased employment in Western countries but has reallocated information have-less employment toward the service sector, and there would probably be the same effect in Egypt.

The study highlights the need for Egyptian policymakers to encourage the manufacturing and service sectors to provide huge working opportunities. The Egyptian government has to change the educational policies, at all stages, to include digital learning skills so IT can be incorporated in a wide range of economic activities. Further research includes: conducting a survey to measure the contribution of the entrepreneurial part of the information have-less employment in Egypt. In addition, a model may be developed, by the researcher to examine the reallocation of employees in Egypt.

Studying employment, in Egypt, using the conceptual framework of the information age is rarely being done.

Small retail stores in the luxury market face significant challenges due to fluctuations in market demand. This task turns challenging as it requires effectively coordinating and translating customer needs into specific requirements that align with retail goals and available resources. However, limited empirical research exists investigating how managers can address service value and quality attributes in small retail stores. This article aims to bridge this gap by investigating the role of quality function deployment (QFD) in improving market and quality requirements management in small retail stores.

Based on the case study, a customer survey was initially conducted to gather information on critical characteristics valued in the luxury retail segment. QFD was used to assist the company in identifying and prioritizing key quality attributes to meet customer requirements effectively.

The findings demonstrate that implementing QFD in small luxury retail stores empowers managers to identify previously neglected product and service quality aspects. The article shows that QFD informs organizational adaptations that align with the demands of the retail market, leading to an improved ability to meet customer expectations and enhance customer value through the development of enhanced products and services. The study showcases the efficacy of the tested methodology in effectively capturing and prioritizing both tangible and intangible customer needs in retail.

Findings offer valuable insights to retail managers of small luxury stores, providing actionable market-oriented strategies. By implementing the recommended practices, managers can improve the store’s competitiveness and better cater to the customer base.

This study contributes to bridging persistent knowledge gaps by addressing the unique context of small luxury retail stores and introducing the application of QFD in this setting. The insights gained from this research are relevant to both retailing and quality management literature. Considering the growing prevalence of transformations in the retail industry, the study provides practical implications for retail managers in effectively navigating these changes.

The study aims to identify the central paradoxical tensions existing in developing resilience in organisations. The main thrust of this study is to develop a thorough understanding of diverse conflicting tensions in building resilience and develop the possible strategies to surmount these tensions.

Using the case study approach, the study applied theory-elaboration strategy as this study is based on well-established literature from both digitalisation and resilience. The study uses the paradox theory lens in a case study to reconcile both theories with contextual idiosyncrasies.

The paradox theory lens provides perspectives to understand tensions during resilience development and the role of digital transformation in this process. It assesses the potential solutions for surmounting tensions in resilient operations. The mapping of workable solutions with different paradoxes and propositions has been proposed for future empirical research.

The study suggests that practitioners should not consider resilience and sustainability as mutually exclusive; instead, managers must embrace ongoing tensions to bring solutions to address these two essential organisational priorities.

To the best of the authors' knowledge, this is the first empirical study that applies paradox theory to understand how an organisation can build resilience while confronting several paradoxes. The study findings support that resilience practices can move in tandem with environmental sustainability goals rather than being usually mutually exclusive.