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This paper aims to show how a sociological description – a swarm analysis of the Nazi dictatorship – initially made with the means borrowed from George Spencer-Brown’s Calculus of Indications, can be transformed into a digital circuit and with which methods and tools of digital mathematics this digital circuit can be analyzed and described in its behavior. Thus, the paper also aims to contribute to a better understanding of Chapter 11 of “Laws of Form.”

The analysis uses methods of automata theory for finite, deterministic automata. Basic set operations of digital mathematics and special set operations of the Boolean Differential Calculus are used to calculate digital circuits. The software used is based on ternary logic, in which the binary Boolean logic of the elements {0, 1} is extended by the third element “Don’t care” to {0, 1, −}.

The paper confirms the method of transforming a form into a digital circuit derived from the comparative functional and structural analysis of the Modulator from Chapter 11 of “Laws of Form” and defines general rules for this transformation. It is shown how the indeterminacy of re-entrant forms can be resolved in the medium of time using the methods of automata theory. On this basis, a refined definition of the degree of a form is presented.

The paper shows the potential of interdisciplinary approaches between sociology and information technology and provides methods and tools of digital mathematics such as ternary logic, Boolean Differential Calculus and automata theory for application in sociology.

The development of a sensor microsystems containing all the components of data acquisition system, such as sensors, signal‐conditioning circuits, analog‐digital converter, interface circuits and embedded microcontroller (MCU), has become the focus of attention in many biomedical applications. A review of the microsystems technology is presented in this paper, along with a discussion of the recent trends and challenges associated with its developments. A basic description of each sub‐system is also given. This includes the different front end, mixed analog‐digital, power management, and radio transmitter‐receiver circuits. These sub‐system designs are presented and discussed in a comparative study and final remarks are made. The performance of each sub‐system is assessed regarding many aspects related to the overall system performance.

There are many types of the ADCs implemented in the mobile and wireless devices. Most of these devices are battery operated and operational at low input voltage. SAR ADC is popular for its low power operations and simple architecture. Scientists are still working to make its working faster under the same low power area. There are many SAR-ADC implemented in the past two decades, but still, there is a big room for dual SAR-ADC.

The authors are presenting a dual SAR-ADC with a smaller number of components and blocks. The proposed ultra-low-power circuit of the SAR-ADC consists of four major blocks, which include Bee-bootstrap, Spider-Latch dual comparator, dual SAR-logic and dual digital to analog converter. The authors have used the 90-nm CMOS library for the construction of the design.

The power breaks down of the comparator are dramatically improved from 0.006 to 0.003 uW. The ultimate design has 5 MHz operating frequency with 25 KS/s sampling frequency. The supply voltage is 1.2 V with 35.724 uW power consumption. Signal-to-noise and distortion ratio and spurious-free dynamic range are 65 and 84 dB, respectively. The Walden's figure of merits calculated 7.08 fj/step.

The authors are proposing two-in-one circuit for SAR-ADC named as “dual SAR-ADC”, which obeys the basic equation of duality, derived and proved under the heading of proposed solution. It shows a clear difference between the performance of two circuit-based ADC and one dual circuit ADC. The number of components is reduced by sharing the work load of some key components.

This paper aims to overcome the limitations of low efficiency, low power density and strong electromagnetic interference (EMI) of the existing pulsed melt inert gas (MIG) welding power supply. So a novel and simplified implementation of digital high-power pulsed MIG welding power supply with LLC resonant converter is proposed in this work.

A simple parallel full-bridge LLC resonant converter structure is used to design the digital power supply with high welding current, low arc voltage, high open-circuit voltage and a wide range of arc loads, by effectively exploiting the variable load and high-power applications of LLC resonant converter.

The efficiency of each converter can reach up to 92.3%, under the rated operating condition. Notably, with proposed scheme, a short-circuit current mutation of 300 A can stabilize at 60 A within 8 ms. Furthermore, the pulsed MIG welding test shows that a stable welding process with 280 A peak current can be realized and a well-formed weld bead can be obtained, thereby verifying the feasibility of LLC resonant converter for pulsed MIG welding power supply.

The high efficiency, high power density and weak EMI of LLC resonant converter are conducive to the further optimization of pulsed MIG welding power supply. Consequently, a high performance welding power supply is implemented by taking adequate advantages of LLC resonant converter, which can provide equipment support for exploring better pulsed MIG welding processes.

With the development of integrated circuit and communication technology, digital secure communication has become a research hotspot. This paper aims to design a five-dimensional fractional-order chaotic secure communication circuit with sliding mode synchronous based on microcontroller (MCU).

First, a five-dimensional fractional-order chaotic system for encryption is constructed. The approximate numerical solution of fractional-order chaotic system is calculated by Adomian decomposition method, and the phase diagram is obtained. Then, combined with the complexity and 0–1 test algorithm, the parameters of fractional-order chaotic system for encryption are selected. In addition, a sliding mode controller based on the new reaching law is constructed, and its stability is proved. The chaotic system can be synchronized in a short time by using sliding mode control synchronization.

The electronic circuit is implemented to verify the feasibility and effectiveness of the designed scheme.

It is feasible to realize fractional-order chaotic secure communication using MCU, and further reducing the synchronization error is the focus of future work.

The electrical performance of high‐speed integrated circuits and digital networks strongly depends on the behavior of interconnects between various components of these systems. The prediction of such performance can only be achieved by the used of computer‐aided design and simulation tools. The simulation of high‐speed digital circuits has gained a significant role in the past few years since it is critical in the evaluation of noise levels, signal corruption and signal delay in fast switching circuits. This paper explores the various aspects and techniques for transmission line simulation; in particular, two different methods are described: the scattering parameter method and the optimal method.

A high-precision gyroscope is an important tool for accurate positioning, and the amplitude stability and frequency tracking ability of the drive control system are important and necessary conditions to ensure the precision of micro-electro-mechanical systems (MEMS) gyroscopes. To improve the precision of MEMS gyroscopes, this paper proposes a method to improve the amplitude stability and frequency tracking ability of a drive control system.

A frequency tracking loop and an amplitude control loop are proposed to improve the frequency tracking ability and amplitude stability of the drive control system for a MEMS gyroscopes. The frequency tracking loop mainly includes a phase detector, a frequency detector and a loop filter. And, the amplitude control loop mainly includes an amplitude detector, a low-pass filter and an amplitude control module. The simulation studies on the frequency tracking loop, amplitude control loop and drive control system composed of these two loops are implemented. The corresponding digital drive control algorithm is realized by the Verilog hardware description language, which is downloaded to the application-specific integrated circuits (ASIC) platform to verify the performances of the proposed method.

The simulation experiments in Matlab/Simulink and tests on the ASIC platform verify that the designed drive control system can keep the amplitude stable and track the driving frequency in real time with high precision.

This study shows a way to design and realize a drive control system for MEMS gyroscopes to improve their tracking ability. It is helpful for improving the precision of MEMS gyroscopes.

The purpose of this paper is to explain the growing importance of design for assembly (DFA) and design for test (DFT) for compact medical electronics products.

The paper discusses compact products based on leading‐edge electronic components such as digital signal processors, radio frequency (RF) and mixed‐signal chips, advanced ball‐grid array, quad flat pack, chip scale package devices.

Advanced technologies like these create higher component and joint counts and increasing PCB densities. A higher probability of defects and faults is created, which lead to lower yields for a specific product line unless proper effective DFA and DFT are implemented.

The paper details DFA, high‐speed PCB design, mixed‐signal design, and DFT.

With increasing complexity in compact medical products, it is prudent to emphasize DFA and DFT for ultimate reliability during product development and production cycles.

The purpose of this paper is to develop an field programmable gate array (FPGA)-based neuron circuit to mimic dynamical behaviors of tabu learning neuron model.

Numerical investigations for the tabu learning neuron model show the coexisting behaviors of bi-stability. To reproduce the numerical results by hardware experiments, a digitally FPGA-based neuron circuit is constructed by pure floating-point operations to guarantee high computational accuracy. Based on the common floating-point operators provided by Xilinx Vivado software, the specific functions used in the neuron model are designed in hardware description language programs. Thus, by using the fourth-order Runge-Kutta algorithm and loading the specific functions orderly, the tabu learning neuron model is implemented on the Xilinx FPGA board.

With the variation of the activation gradient, the initial-related coexisting attractors with bi-stability are found in the tabu learning neuron model, which are experimentally demonstrated by a digitally FPGA-based neuron circuit.

Without any piecewise linear approximations, a digitally FPGA-based neuron circuit is implemented using pure floating-point operations, from which the initial conditions-related coexisting behaviors are experimentally demonstrated in the tabu learning neuron model.

Packages for multichip modules in military airborne applications must hava some fundamental characteristics: high thermal conductivity, low density, good mechanical properties and a coefficient of thermal expansion nearly equal to that of the microelectronic substrate installed in the package. In many cases, the substrate is alumina with a CTE of 6.5 ppm/°C. Materials such as aluminium, titanium or Kovar fulfil only part of the above requirements. This is critical when large packages are used, such as in electronic warfare systems where modules include wideband RF circuits with large alumina substrates next to dense digital circuits. The solution is then aluminium/ silicon carbide (Al/SiC). The aim of the paper is to present the development and qualification of large packages combining both RF and digital circuitry. The size taken into account in the study is 220 × 220 mm: it covers most of the electronic needs in terms of surface. Various aspects have been analysed from the perspective of the package manufacturer and the end‐user. The interest of Al/SiC is shown by a thermal analysis of a conduction cooled module with different core materials: the reduction in temperature gradient, which for some components reaches 20° C, has a strong effect on the module reliability. The different technological choices, for a first type of packages, are described: an Al/SiC baseplate with an iron‐nickel alloy for the ring and the lid, brazed feedthroughs (within the Al/SiC baseplate) and connectors, surface treatment, ring brazing material, lid welding technique. A second type of packages is also presented: the main difference lies in the interconnections. RF ceramic (HTCC) inserts are introduced in the ring frame. Various RF measurements show the interest of the different package technologies, especially the ceramic inserts with very good results up to 20 GHz.