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1 – 10 of over 10000Vadimas Verdingovas, Salil Joshy, Morten Stendahl Jellesen and Rajan Ambat
The purpose of this study is to show that the humidity levels for surface insulation resistance (SIR)-related failures are dependent on the type of activators used in no-clean…
Abstract
Purpose
The purpose of this study is to show that the humidity levels for surface insulation resistance (SIR)-related failures are dependent on the type of activators used in no-clean flux systems and to demonstrate the possibility of simulating the effects of humidity and contamination on printed circuit board components and sensitive parts if typical SIR data connected to a particular climatic condition are available. This is shown on representative components and typical circuits.
Design/methodology/approach
A range of SIR values obtained on SIR patterns with 1,476 squares was used as input data for the circuit analysis. The SIR data were compared to the surface resistance values observable on a real device printed circuit board assembly. SIR issues at the component and circuit levels were analysed on the basis of parasitic circuit effects owing to the formation of a water layer as an electrical conduction medium.
Findings
This paper provides a summary of the effects of contamination with various weak organic acids representing the active components in no-clean solder flux residue, and demonstrates the effect of humidity and contamination on the possible malfunctions and errors in electronic circuits. The effect of contamination and humidity is expressed as drift from the nominal resistance values of the resistors, self-discharge of the capacitors and the errors in the circuits due to parasitic leakage currents (reduction of SIR).
Practical/implications
The methodology of the analysis of the circuits using a range of empirical leakage resistance values combined with the knowledge of the humidity and contamination profile of the electronics can be used for the robust design of a device, which is also important for electronic products relying on low current consumption for long battery lifetime.
Originality/value
Examples provide a basic link between the combined effect of humidity and contamination and the performance of electronic circuits. The methodology shown provides the possibility of addressing the climatic reliability of an electronic device at the early stage of device design by using typical SIR data representing the possible climate exposure.
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Sébastien Lalléchére, Jamel Nebhen, Yang Liu, George Chan, Glauco Fontgalland, Wenceslas Rahajandraibe, Fayu Wan and Blaise Ravelo
The purpose of this paper is to study, a bridged-T topology with inductorless passive network used as a bandpass (BP) negative group delay (NGD) function.
Abstract
Purpose
The purpose of this paper is to study, a bridged-T topology with inductorless passive network used as a bandpass (BP) negative group delay (NGD) function.
Design/methodology/approach
The BP NGD topology under study is composed of an inductorless passive resistive capacitive network. The circuit analysis is elaborated from the equivalent impedance matrix. Then, the analytical model of the C-shunt bridged-T topology voltage transfer function is established. The BP NGD analysis of the considered topology is developed in function of the bridged-T parameters. The NGD properties and characterizations of the proposed topology are analytically expressed. Moreover, the relevance of the BP NGD theory is verified with the design and fabrication of surface mounted device components-based proof-of-concept (PoC).
Findings
From measurement results, the BP NGD network with −151 ns at the center frequency of 1 MHz over −6.6 dB attenuation is in very good agreement with the C-shunt bridged-T PoC.
Originality/value
This paper develops a mathematical modeling theory and measurement of a C-shunt bridged-T network circuit.
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This work is intended to historically commemorate the one hundredth anniversary of the invention of a new type of electronic circuit, referred to in 1919 by Abraham and Bloch as a…
Abstract
Purpose
This work is intended to historically commemorate the one hundredth anniversary of the invention of a new type of electronic circuit, referred to in 1919 by Abraham and Bloch as a multivibrator and by Eccles and Jordan as a trigger relay (later known as a flip-flop).
Design/methodology/approach
The author also considers the circuit-technical side of this new type of circuit, considering the technological change as well as the mathematical concepts developed in the context of the analysis of the circuit.
Findings
The multivibrator resulted in a “circuit shape” which became one of the most applied nonlinear circuits in electronics. It is shown that at the beginning the multivibrator as well as the flip-flop circuits were used because their interesting properties in the frequency domain.
Originality/value
Therefore, it is a very interesting subject to consider the history of the multivibrator as electronic circuits in different technologies including tube, transistors and integrated circuits as well as the mathematical theory based on the concept from electrical circuit theory.
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This paper explains why the data with which thermal designers have to work is uncertain and incomplete. It then describes how accepting this uncertainty unlocks the shackles of…
Abstract
This paper explains why the data with which thermal designers have to work is uncertain and incomplete. It then describes how accepting this uncertainty unlocks the shackles of accurate temperature prediction and gives the designer the freedom to tackle the different aspects of thermal design at an appropriate and simple level. The latter part of the paper concentrates on the thermal design of circuit boards, first for steady state and then for transient operation.
Hongyu Du, Rong Yang, Taochen Gu, Xiang Zhou, Samar Yazdani, Eric Sambatra, Fayu Wan, Sébastien Lallechere and Blaise Ravelo
The purpose of this paper is to introduce an innovative theoretical, numerical and experimental investigations on the HP NGD function. The identified HP NGD topology under study…
Abstract
Purpose
The purpose of this paper is to introduce an innovative theoretical, numerical and experimental investigations on the HP NGD function. The identified HP NGD topology under study is constituted by first order passive RC-network. The simulations and measurements confirm in very good agreement the HP NGD behaviors of the tested circuits. NGD responses with optimal values of about -1 ns and cut-off frequencies of about 20 MHz are obtained.
Design/methodology/approach
The identified HP NGD topology understudy is constituted by a first-order passive Resistor-capacitor RC network. An innovative approach to HP NGD analysis is developed. The analytical investigation from the voltage transfer function showing the meaning of HP properties is established.
Findings
This paper introduces innovative theoretical, numerical and experimental investigations on the HP NGD function.
Originality/value
The NGD characterization as a function of the resistance and capacitance parameters is investigated. The feasibility of the HP NGD function is verified with proofs of concept constituted of lumped surface mounted components on printed circuit boards. The simulations and measurements confirm in very good agreement the HP NGD behaviors of the tested circuits. NGD responses with optimal values of about −1 ns and cut-off frequencies of about 20 MHz are obtained.
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ITS: Intertrade Scientific Ltd, the UK based manufacturer of the MCT/Browne InfraRed Reflow Soldering Systems for SMT and Hybrid applications, as part of their aggressive drive…
Abstract
ITS: Intertrade Scientific Ltd, the UK based manufacturer of the MCT/Browne InfraRed Reflow Soldering Systems for SMT and Hybrid applications, as part of their aggressive drive into Europe, has announced the signing of a distributor agreement with Maquinaria Suiza SA of Spain. Under the agreement, Maquinaria Suiza will be the sole supplier of the highly successful product range to Spain and Portugal.
Miguel Ángel San Pablo Juárez, Alexander Zemliak and Eduardo Ríos Silva
This work seeks to present the theoretical study considerations and the characteristics of a general design methodology in optimal time for electronic systems using numerical…
Abstract
Purpose
This work seeks to present the theoretical study considerations and the characteristics of a general design methodology in optimal time for electronic systems using numerical methods and optimal control theory. Through this, the design problem of a system is formulated in terms of optimal control in minimal time.
Design/methodology/approach
This general design methodology includes the traditional design strategy (TDS), and the modified traditional design strategy (MTDS), where the model of the system is part of the optimization procedure but an objective function of the optimization process is constructed such as includes the traditional objective function and some penalty functions that feign the model of the system. Many special control functions are introduced artificially to generalize the methodology and produce several design trajectories for the same optimization process – the first and final trajectories correspond to TDS and MTDS, respectively. The combination of these trajectories produce an infinite number of design strategies, some of these are quasi‐optimal in time and only one is optimal in time.
Findings
Qualitative and numeric results of this iterative process are generated in a personal computer in a C++ language elaborated with a visual C++ graphic user interface. An algorithm is constructed to form an optimal in time design strategy switching from a MTDS subset to a TDS subset. Results of measured times are analyzed, showing that there is a control input U, such that the objective function is minimized in a minimum time.
Originality/value
These ideas are proposed using method of gradient optimization and special acceleration effect.
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Mohammad Sadegh Mirzajani Darestani, Mohammad Bagher Tavakoli and Parviz Amiri
The purpose of this paper is to propose a new design strategy to enhance the bandwidth and efficiency of the power amplifier.
Abstract
Purpose
The purpose of this paper is to propose a new design strategy to enhance the bandwidth and efficiency of the power amplifier.
Design/methodology/approach
To realize the introduced design strategy, a power amplifier was designed using TSMC CMOS 0.18um technology for operating in the Ka-band, i.e. the frequency range of 26.5-40 GHz. To design the power amplifier, first, a power divider (PD) with a very wide bandwidth, i.e. 1-40 GHz, was designed to cover the whole Ka-band. The designed Doherty power amplifier consisted of two different amplification paths called main and auxiliary. To amplify the signal in each of the two pathways, a cascade distributed power amplifier was used. The main reason for combining the distributed structure and cascade structure was to increase the gain and linearity of the power amplifier.
Findings
Measurements results for designed power dividers are in good agreement with simulations results. The simulation results for the introduced structure of the power amplifier indicated that the gain of the proposed power amplifier at the frequency of 26-35 GHz was more than 30 dB. The diagram of return loss at the input and output of the power amplifier in the whole Ka-band was less than −8dB. The maximum power-added efficiency (PAE) of the designed power amplifier was 80%. The output P1dB of the introduced structure was 36 dB and the output power of the power amplifier was 36 dBm. Finally, the IP3 value of the power amplifier was about 17 dB.
Originality/value
The strategy presented in this paper is based on the usage of Doherty and distributed structures and a new wideband power divider to benefit from their advantages simultaneously.
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The purpose of this paper is to define the process of analog circuit optimization on the basis of the control theory application. This approach produces many different strategies…
Abstract
Purpose
The purpose of this paper is to define the process of analog circuit optimization on the basis of the control theory application. This approach produces many different strategies of optimization and determines the problem of searching of the best strategy in sense of minimal computer time. The determining of the best strategy of optimization and a searching of possible structure of this strategy with a minimal computer time is a principal aim of this work.
Design/methodology/approach
Different kinds of strategies for circuit optimization have been evaluated from the point of view of operations’ number. The generalized methodology for the optimization of analog circuit was formulated by means of the optimum control theory. The main equations for this methodology were elaborated. These equations include the special control functions that are introduced artificially. This approach generalizes the problem and generates an infinite number of different strategies of optimization. A problem of construction of the best algorithm of optimization is defined as a typical problem of the control theory. Numerical results show the possibility of application of this approach for optimization of electronic circuits and demonstrate the efficiency and perspective of the proposed methodology.
Findings
Examples show that the better optimization strategies that are appeared in limits of developed approach have a significant time gain with respect to the traditional strategy. The time gain increases when the size and the complexity of the optimized circuit are increasing. An additional acceleration effect was used to improve the properties of presented optimization process.
Originality/value
The obtained results show the perspectives of new approach for circuit optimization. A large set of various strategies of circuit optimization serves as a basis for searching the better strategies with a minimum computer time. The gain in processor time for the best strategy reaches till several thousands in comparison with traditional approach.
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Mario Gonzalez, Fabrice Axisa, Frederick Bossuyt, Yung‐Yu Hsu, Bart Vandevelde and Jan Vanfleteren
The purpose of this paper is to present an update on the progress of the design and reliability of stretchable interconnections for electronic circuits.
Abstract
Purpose
The purpose of this paper is to present an update on the progress of the design and reliability of stretchable interconnections for electronic circuits.
Design/methodology/approach
Finite element modelling (FEM) is used to analyse the physical behaviour of stretchable interconnects under different loading conditions. The fatigue life of a copper interconnect embedded into a silicone matrix has been evaluated using the Coffin‐Manson relation and FEM.
Findings
The mechanical properties of the substrate and the design of the metal interconnection play an important role on the fatigue lifetime of circuit. In the case of copper embedded into a PDMS Sylgard 186, more than 2,500 tensile cycles have been observed for a periodic deformation of 10 per cent.
Research limitations/implications
Reliability results are limited and need further work to create a more accurate empirical model to estimate the lifetime of stretchable interconnections.
Originality/value
The combined use of FEM and experimental analysis enable a more reliable design of the stretchable metal interconnections. The proposed horseshoe design offers the benefit of reduced permanent damage during elongation.
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