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Article
Publication date: 4 September 2017

Fei Chong Ng, Mohamad Aizat Abas, MZ Abdullah, MHH Ishak and Gean Yuen Chong

This paper aims to present experimental and finite volume method (FVM)-based simulation studies on the scaling effect on the capillary contact angle and entrant pressure for a…

Abstract

Purpose

This paper aims to present experimental and finite volume method (FVM)-based simulation studies on the scaling effect on the capillary contact angle and entrant pressure for a three-dimensional encapsulation process of ball-grid array (BGA).

Design/methodology/approach

With the development of various sizes of BGA packages, the scaling effect of BGA model on capillary underfill (CUF) process is investigated together with the influences of different industrial standard solder bump arrangements and dispensing methods used as case study.

Findings

The experimental results agree well to the simulation findings with minimal deviation in filling time and similar flow front profiles for all setups. The results revealed that the capillary contact angle of flow front decreases in scale-up model with larger gap height observed and lengthens the encapsulation process. Statistical correlation studies are conducted and accurate regression equations are obtained to relate the gap height to the completion filling time and contact angle. CUF threshold capillary pressures were computed based on Leverett-J function and found to be increasing with the scale size of the package.

Practical implications

These statistical data provide accurate insights into the impact of BGA’s scale sizes to the CUF process that will be benefiting the future design of BGA package. This study provided electronic designers with profound understanding on the scaling effect in CUF process of BGA, which may be extended to the future development of miniature-sized BGA and multi-stack device.

Originality/value

This study relates the flow behaviour of encapsulant to its capillary contact angle and Leverett-J pressure threshold, in the CUF process of different BGA and dispensing conditions. To date, no research has been found to predict the threshold pressure on the gap between the chip and substrate.

Details

Soldering & Surface Mount Technology, vol. 29 no. 4
Type: Research Article
ISSN: 0954-0911

Keywords

Article
Publication date: 5 September 2020

Fei Chong Ng, Mohd Hafiz Zawawi and Mohamad Aizat Abas

The purpose of the study is to investigate the spatial aspects of underfill flow during the flip-chip encapsulation process, for instance, meniscus evolution and contact line jump…

Abstract

Purpose

The purpose of the study is to investigate the spatial aspects of underfill flow during the flip-chip encapsulation process, for instance, meniscus evolution and contact line jump (CLJ). Furthermore, a spatial-based void formation mechanism during the underfill flow was formulated.

Design/methodology/approach

The meniscus evolution of underfill fluid subtended between the bump array and the CLJ phenomenon were visualized numerically using the micro-mesh unit cell approach. Additionally, the meniscus evolution and CLJ phenomenon were modelled analytically based on the formulation of capillary physics. Meanwhile, the mechanism of void formation was explained numerically and analytically.

Findings

Both the proposed analytical and current numerical findings achieved great consensus and were well-validated experimentally. The variation effects of bump pitch on the spatial aspects were analyzed and found that the meniscus arc radius and filling distance increase with the pitch, while the subtended angle of meniscus arc is invariant with the pitch size. For larger pitch, the jump occurs further away from the bump entrance and takes longer time to attain the equilibrium meniscus. This inferred that the concavity of meniscus arc was influenced by the bump pitch. On the voiding mechanism, air void was formed from the air entrapment because of the fluid-bump interaction. Smaller voids tend to merge into a bigger void through necking and, subsequently, propagate along the underfill flow.

Practical implications

The microscopic spatial analysis of underfill flow would explain fundamentally how the bump design will affect the macroscopic filling time. This not only provides alternative visualization tool to analyze flow pattern in the industry but also enables the development of accurate analytical filling time model. Moreover, the void formation mechanism gave substantial insights to understand the root causes of void defects and allow possible solutions to be formulated to tackle this issue. Additionally, the microfluidics sector could also benefit from these spatial analysis insights.

Originality/value

Spatial analysis on underfill flow is scarcely conducted, as the past research studies mainly emphasized on the temporal aspects. Additionally, this work presented a new mechanism on the void formation based on the fluid-bump interaction, in which the formation and propagation of micro-voids were numerically visualized for the first time. The findings from current work provided fundamental information on the flow interaction between underfill fluid and solder bump to the package designers for optimization work and process enhancement.

Details

Soldering & Surface Mount Technology, vol. 33 no. 2
Type: Research Article
ISSN: 0954-0911

Keywords

Article
Publication date: 1 August 2002

Michael A. Previti and Peter Ongley

No‐Flow or fluxing underfills will play a key role in the future of flip chip processing. Properly formulated No‐Flow Underfills decrease manufacturing time and cost of producing…

Abstract

No‐Flow or fluxing underfills will play a key role in the future of flip chip processing. Properly formulated No‐Flow Underfills decrease manufacturing time and cost of producing flip chip packages. The reliability and processing ability allows these underfills to be incorporated into many unique applications. Processing yields and reliability on ceramic, flex and organic substrates will allow No‐Flow Underfills to be used successfully in future Bluetooth and wireless telecommunication products. This work gives the reliability of a commercially available No‐Flow Underfill on three flip chip and two BGA/CSP test vehicles. A detailed failure mode analysis of the underfill was also performed.

Details

Microelectronics International, vol. 19 no. 2
Type: Research Article
ISSN: 1356-5362

Keywords

Article
Publication date: 4 February 2020

Muhammad Naqib Nashrudin, Zhong Li Gan, Aizat Abas, M.H.H. Ishak and M. Yusuf Tura Ali

In line with the recent development of flip-chip reliability and underfill process, this paper aims to comprehensively investigate the effect of different hourglass shape solder…

Abstract

Purpose

In line with the recent development of flip-chip reliability and underfill process, this paper aims to comprehensively investigate the effect of different hourglass shape solder joint on underfill encapsulation process by mean of experimental and numerical method.

Design/methodology/approach

Lattice Boltzmann method (LBM) numerical was used for the three-dimensional simulation of underfill process. The effects of ball grid arrays (BGA) encapsulation process in terms of filling time of the fluid were investigated. Experiments were then carried out to validate the simulation results.

Findings

Hourglass shape solder joint has shown the shortest filling time for underfill process compared to truncated sphere. The underfill flow obtained from both simulation and experimental results are found to be in good agreement for the BGA model studied. The findings have also shown that the filling time of Hourglass 2 with parabolic shape gives faster filling time compared to the Hourglass 1 with hemisphere angle due to bigger cross-sectional area of void between the solder joints.

Practical implications

This paper provides reliable insights to the effect of hourglass shape BGA on the encapsulation process that will benefit future development of BGA packages.

Originality/value

LBM numerical method was implemented in this research to study the flow behaviour of an encapsulation process in term of filling time of hourglass shape BGA. To date, no research has been found to simulate the hourglass shape BGA using LBM.

Details

Soldering & Surface Mount Technology, vol. 32 no. 3
Type: Research Article
ISSN: 0954-0911

Keywords

Article
Publication date: 24 October 2023

Calvin Ling, Muhammad Taufik Azahari, Mohamad Aizat Abas and Fei Chong Ng

This paper aims to study the relationship between the ball grid array (BGA) flip-chip underfilling process parameter and its void formation region.

Abstract

Purpose

This paper aims to study the relationship between the ball grid array (BGA) flip-chip underfilling process parameter and its void formation region.

Design/methodology/approach

A set of top-down scanning acoustic microscope images of BGA underfill is collected and void labelled. The labelled images are trained with a convolutional neural network model, and the performance is evaluated. The model is tested with new images, and the void area with its region is analysed with its dispensing parameter.

Findings

All findings were well-validated with reference to the past experimental results regarding dispensing parameters and their quantitative regional formation. As the BGA is non-uniform, 85% of the test samples have void(s) formed in the emptier region. Furthermore, the highest rating factor, valve dispensing pressure with a Gini index of 0.219 and U-type dispensing pattern set of parameters generally form a lower void percentage within the underfilling, although its consistency is difficult to maintain.

Practical implications

This study enabled manufacturers to forecast the void regional formation from its filling parameters and array pattern. The filling pressure, dispensing pattern and BGA relations could provide qualitative insights to understand the void formation region in a flip-chip, enabling the prompt to formulate countermeasures to optimise voiding in a specific area in the underfill.

Originality/value

The void regional formation in a flip-chip underfilling process can be explained quantitatively with indicative parameters such as valve pressure, dispensing pattern and BGA arrangement.

Details

Soldering & Surface Mount Technology, vol. 36 no. 1
Type: Research Article
ISSN: 0954-0911

Keywords

Article
Publication date: 15 December 2021

Fei Chong Ng, Aizat Abas, Muhammad Naqib Nashrudin and M. Yusuf Tura Ali

This paper aims to study the filling progression of underfill flow and void formation during the flip-chip encapsulation process.

Abstract

Purpose

This paper aims to study the filling progression of underfill flow and void formation during the flip-chip encapsulation process.

Design/methodology/approach

A new parameter of filling progression that relates volume fraction filled to filling displacement was formulated analytically. Another indicative parameter of filling efficiency was also introduced to quantify the voiding fraction in filling progression. Additionally, the underfill process on different flip-chips based on the past experiments was numerically simulated.

Findings

All findings were well-validated with reference to the past experimental results, in terms of quantitative filling progression and qualitative flow profiles. The volume fraction filled increases monotonically with the filling displacement and thus the filling time. As the underfill fluid advances, the size of the void decreases while the filling efficiency increases. Furthermore, the void formed during the underfilling flow stage was caused by the accelerated contact line jump at the bump entrance.

Practical implications

The filling progression enabled manufacturers to forecast the underfill flow front, as it advances through the flip-chip. Moreover, filling progression and filling efficiency could provide quantitative insights for the determination of void formations at any filling stages. The voiding formation mechanism enables the prompt formulation of countermeasures.

Originality/value

Both the filling progression and filling efficiency are new indicative parameters in quantifying the performance of the filling process while considering the reliability defects such as incomplete filling and voiding.

Details

Soldering & Surface Mount Technology, vol. 34 no. 4
Type: Research Article
ISSN: 0954-0911

Keywords

Article
Publication date: 1 June 1999

Ken Gilleo, Bob Boyes, Steve Corbett, Gary Larson and Dave Price

Polymer thick film (PTF) technology provides the lowest cost, cleanest and most efficient manufacturing method for producing flexible circuits. Non‐contact radio frequency (RF…

Abstract

Polymer thick film (PTF) technology provides the lowest cost, cleanest and most efficient manufacturing method for producing flexible circuits. Non‐contact radio frequency (RF) smart cards and related information transaction devices, such as RFID tags, appear to be a good fit for PTF‐flex. Flip chip also seems well suited for these “contactless” RF transceiver products. Flip chip and PTF adhesive technologies are highly compatible and synergistic. All PTF SMT adhesives assembly methods are viable for flip chip. However, the merging of flip chip with PTF‐flex presents major challenges in design, materials and processing. This paper will compare assembly methods and discuss obstacles and solutions for state‐of‐the‐art flip chip on flex within the RFID product environment.

Details

Circuit World, vol. 25 no. 2
Type: Research Article
ISSN: 0305-6120

Keywords

Article
Publication date: 20 May 2021

Fei Chong Ng and Mohamad Aizat Abas

This paper aims to present new analytical model for the filling times prediction in flip-chip underfill encapsulation process that is based on the surface energetic for post-bump…

Abstract

Purpose

This paper aims to present new analytical model for the filling times prediction in flip-chip underfill encapsulation process that is based on the surface energetic for post-bump flow.

Design/methodology/approach

The current model was formulated based on the modified regional segregation approach that consists of bump and post-bump regions. Both the expansion flow and the subsequent bumpless flow as integrated in the post-bump region were modelled considering the surface energy–work balance.

Findings

Upon validated with the past underfill experiment, the current model has the lowest root mean square deviation of 4.94 s and maximum individual deviation of 26.07%, upon compared to the six other past analytical models. Additionally, the current analytically predicted flow isolines at post-bump region are in line with the experimental observation. Furthermore, the current analytical filling times in post-bump region are in better consensus with the experimental times as compared to the previous model. Therefore, this model is regarded as an improvised version of the past filling time models.

Practical implications

The proposed analytical model enables the filling time determination for flip-chip underfill process at higher accuracy, while providing more precise and realistic post-bump flow visualization. This model could benefit the future underfill process enhancement and package design optimization works, to resolve the productivity issue of prolonged filling process.

Originality/value

The analytical underfill studies are scarce, with only seven independent analytical filling time models being developed to date. In particular, the expansion flow of detachment jump was being considered in only two previous works. Nonetheless, to the best of the authors’ knowledge, there is no analytical model that considered the surface energies during the underfill flow or based on its energy–work balance. Instead, the previous modelling on post-bump flow was based on either kinematic or geometrical that is coupled with major assumptions.

Details

Soldering & Surface Mount Technology, vol. 33 no. 5
Type: Research Article
ISSN: 0954-0911

Keywords

Article
Publication date: 26 February 2021

Lun Hao Tung, Fei Chong Ng, Aizat Abas, M.Z. Abdullah, Zambri Samsudin and Mohd Yusuf Tura Ali

This paper aims to determine the optimum set of temperatures through correlation study to attain the most effective capillary flow of underfill in a multi-stack ball grid array…

Abstract

Purpose

This paper aims to determine the optimum set of temperatures through correlation study to attain the most effective capillary flow of underfill in a multi-stack ball grid array (BGA) chip device.

Design/methodology/approach

Finite volume method is implemented in the simulation. A three-layer multi-stack BGA is modeled to simulate the underfill flow. The simulated models were well validated with the previous experimental work on underfill process.

Findings

The completion filling time shows high regression R-squared value of up to 0.9918, which indicates a substantial acceleration on the underfill process because of incorporation of thermal delta. An introduction of 11 °C thermal delta to the multi-stacks BGA managed to reduce the filling time by up to 16.4%.

Practical implications

Temperature-induced capillary flow is a relatively new type of driven underfill designed specifically for package on package BGA components. Its simple implementation can further improve the productivity of existing underfill process in the industry that is desirable in reducing the process lead time.

Originality/value

The effect of temperature-induced capillary flow in underfill encapsulation on multi-stacks BGA by means of statistical correlation study is a relatively new topic, which has never been reported in any other research according to the authors’ knowledge.

Details

Microelectronics International, vol. 38 no. 2
Type: Research Article
ISSN: 1356-5362

Keywords

Article
Publication date: 11 October 2019

Fei Chong Ng, Mohamad Aizat Abas and Mohd Zulkifly Abdullah

This paper aims to introduce a new indicative parameter of filling efficiency to quantify the performance and productivity of the flip-chip underfill encapsulation process

Abstract

Purpose

This paper aims to introduce a new indicative parameter of filling efficiency to quantify the performance and productivity of the flip-chip underfill encapsulation process. Additionally, the variation effect of the bump pitch of flip-chip on the filling efficiency was demonstrated to provide insight for flip-chip design optimization.

Design/methodology/approach

The filling efficiency was formulated analytically based on the conceptual spatial and temporal perspectives. Subsequently, the effect of bump pitch on filling efficiency was studied based on the past actual-scaled and current scaled-up underfill experiments. The latter scaled-up experiment was validated with both the finite volume method-based numerical simulation and analytical filling time model. Moreover, the scaling validity of scaled-up experiment was justified based on the similarity analysis of dimensionless number.

Findings

Through the scaling analysis, the current scaled-up experimental system is justified to be valid since the adopted scaling factor 40 is less than the theoretical scaling limit of 270. Furthermore, the current experiment was qualitatively well validated with the numerical simulation and analytical filling time model. It is found that the filling efficiency increases with the bump pitch, such that doubling the bump pitch would triple the efficiency.

Practical implications

The new performance indicative index of filling efficiency enables the package designers to justify the variation effect of underfill parameter on the overall underfill process. Moreover, the upper limit of scaling factor for scaled-up package was derived to serve as the guideline for future scaled-up underfill experiments.

Originality/value

The performance of underfill process as highlighted in this paper was never being quantified before in the past literatures. Similarly, the scaling limit that is associated to the scaled-up underfill experiment was never being reported elsewhere too.

Details

Soldering & Surface Mount Technology, vol. 32 no. 1
Type: Research Article
ISSN: 0954-0911

Keywords

1 – 10 of 55