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Article
Publication date: 1 September 2001

Zhaowei Zhong

This paper discusses processes of flip chip on FR‐4 using eutectic solder bumps with possible fewer process steps compared to the full assembly process. Some interesting results…

Abstract

This paper discusses processes of flip chip on FR‐4 using eutectic solder bumps with possible fewer process steps compared to the full assembly process. Some interesting results in terms of the reliability performance of flip chip on FR‐4 assemblies using eutectic solder have been obtained after an almost‐one‐year temperature cycling test. The process steps of underfilling and curing of underfill can be omitted when a suitable epoxy is used for encapsulation. When underfill is conducted, encapsulation is not necessarily needed from a reliability point of view.

Details

Circuit World, vol. 27 no. 3
Type: Research Article
ISSN: 0305-6120

Keywords

Content available
Article
Publication date: 1 April 2000

Brian Ellis

92

Abstract

Details

Soldering & Surface Mount Technology, vol. 12 no. 1
Type: Research Article
ISSN: 0954-0911

Keywords

Content available
Article
Publication date: 1 August 2000

David Kingsley

76

Abstract

Details

Microelectronics International, vol. 17 no. 2
Type: Research Article
ISSN: 1356-5362

Keywords

Content available
119

Abstract

Details

Microelectronics International, vol. 18 no. 1
Type: Research Article
ISSN: 1356-5362

Keywords

Article
Publication date: 1 August 2001

Zhaowei Zhong

Flip chips were assembled on to ceramic boards using eutectic tin‐lead solder with underfill and with/without encapsulation for temperature cycling and…

Abstract

Flip chips were assembled on to ceramic boards using eutectic tin‐lead solder with underfill and with/without encapsulation for temperature cycling and high‐temperature‐high‐humidity tests. After 1.5 years of testing, the reliability performance of the flip chip on board (FCOB) assemblies was compared. All of the FCOB assemblies with underfill, but without encapsulation, survived 5,778 cycles of the temperature cycling test following 5,005 hours of the high‐temperature and high‐humidity test. The results show that encapsulation may not necessarily enhance the reliability of flip chip assemblies and might therefore be omitted.

Details

Soldering & Surface Mount Technology, vol. 13 no. 2
Type: Research Article
ISSN: 0954-0911

Keywords

Article
Publication date: 26 February 2021

Lun Hao Tung, Fei Chong Ng, Aizat Abas, M.Z. Abdullah, Zambri Samsudin and Mohd Yusuf Tura Ali

This paper aims to determine the optimum set of temperatures through correlation study to attain the most effective capillary flow of underfill in a multi-stack ball grid array…

Abstract

Purpose

This paper aims to determine the optimum set of temperatures through correlation study to attain the most effective capillary flow of underfill in a multi-stack ball grid array (BGA) chip device.

Design/methodology/approach

Finite volume method is implemented in the simulation. A three-layer multi-stack BGA is modeled to simulate the underfill flow. The simulated models were well validated with the previous experimental work on underfill process.

Findings

The completion filling time shows high regression R-squared value of up to 0.9918, which indicates a substantial acceleration on the underfill process because of incorporation of thermal delta. An introduction of 11 °C thermal delta to the multi-stacks BGA managed to reduce the filling time by up to 16.4%.

Practical implications

Temperature-induced capillary flow is a relatively new type of driven underfill designed specifically for package on package BGA components. Its simple implementation can further improve the productivity of existing underfill process in the industry that is desirable in reducing the process lead time.

Originality/value

The effect of temperature-induced capillary flow in underfill encapsulation on multi-stacks BGA by means of statistical correlation study is a relatively new topic, which has never been reported in any other research according to the authors’ knowledge.

Details

Microelectronics International, vol. 38 no. 2
Type: Research Article
ISSN: 1356-5362

Keywords

Article
Publication date: 4 February 2020

Muhammad Naqib Nashrudin, Zhong Li Gan, Aizat Abas, M.H.H. Ishak and M. Yusuf Tura Ali

In line with the recent development of flip-chip reliability and underfill process, this paper aims to comprehensively investigate the effect of different hourglass shape solder…

Abstract

Purpose

In line with the recent development of flip-chip reliability and underfill process, this paper aims to comprehensively investigate the effect of different hourglass shape solder joint on underfill encapsulation process by mean of experimental and numerical method.

Design/methodology/approach

Lattice Boltzmann method (LBM) numerical was used for the three-dimensional simulation of underfill process. The effects of ball grid arrays (BGA) encapsulation process in terms of filling time of the fluid were investigated. Experiments were then carried out to validate the simulation results.

Findings

Hourglass shape solder joint has shown the shortest filling time for underfill process compared to truncated sphere. The underfill flow obtained from both simulation and experimental results are found to be in good agreement for the BGA model studied. The findings have also shown that the filling time of Hourglass 2 with parabolic shape gives faster filling time compared to the Hourglass 1 with hemisphere angle due to bigger cross-sectional area of void between the solder joints.

Practical implications

This paper provides reliable insights to the effect of hourglass shape BGA on the encapsulation process that will benefit future development of BGA packages.

Originality/value

LBM numerical method was implemented in this research to study the flow behaviour of an encapsulation process in term of filling time of hourglass shape BGA. To date, no research has been found to simulate the hourglass shape BGA using LBM.

Details

Soldering & Surface Mount Technology, vol. 32 no. 3
Type: Research Article
ISSN: 0954-0911

Keywords

Article
Publication date: 11 October 2019

Fei Chong Ng, Mohamad Aizat Abas and Mohd Zulkifly Abdullah

This paper aims to introduce a new indicative parameter of filling efficiency to quantify the performance and productivity of the flip-chip underfill encapsulation process…

Abstract

Purpose

This paper aims to introduce a new indicative parameter of filling efficiency to quantify the performance and productivity of the flip-chip underfill encapsulation process. Additionally, the variation effect of the bump pitch of flip-chip on the filling efficiency was demonstrated to provide insight for flip-chip design optimization.

Design/methodology/approach

The filling efficiency was formulated analytically based on the conceptual spatial and temporal perspectives. Subsequently, the effect of bump pitch on filling efficiency was studied based on the past actual-scaled and current scaled-up underfill experiments. The latter scaled-up experiment was validated with both the finite volume method-based numerical simulation and analytical filling time model. Moreover, the scaling validity of scaled-up experiment was justified based on the similarity analysis of dimensionless number.

Findings

Through the scaling analysis, the current scaled-up experimental system is justified to be valid since the adopted scaling factor 40 is less than the theoretical scaling limit of 270. Furthermore, the current experiment was qualitatively well validated with the numerical simulation and analytical filling time model. It is found that the filling efficiency increases with the bump pitch, such that doubling the bump pitch would triple the efficiency.

Practical implications

The new performance indicative index of filling efficiency enables the package designers to justify the variation effect of underfill parameter on the overall underfill process. Moreover, the upper limit of scaling factor for scaled-up package was derived to serve as the guideline for future scaled-up underfill experiments.

Originality/value

The performance of underfill process as highlighted in this paper was never being quantified before in the past literatures. Similarly, the scaling limit that is associated to the scaled-up underfill experiment was never being reported elsewhere too.

Details

Soldering & Surface Mount Technology, vol. 32 no. 1
Type: Research Article
ISSN: 0954-0911

Keywords

Article
Publication date: 15 December 2021

Fei Chong Ng, Aizat Abas, Muhammad Naqib Nashrudin and M. Yusuf Tura Ali

This paper aims to study the filling progression of underfill flow and void formation during the flip-chip encapsulation process.

Abstract

Purpose

This paper aims to study the filling progression of underfill flow and void formation during the flip-chip encapsulation process.

Design/methodology/approach

A new parameter of filling progression that relates volume fraction filled to filling displacement was formulated analytically. Another indicative parameter of filling efficiency was also introduced to quantify the voiding fraction in filling progression. Additionally, the underfill process on different flip-chips based on the past experiments was numerically simulated.

Findings

All findings were well-validated with reference to the past experimental results, in terms of quantitative filling progression and qualitative flow profiles. The volume fraction filled increases monotonically with the filling displacement and thus the filling time. As the underfill fluid advances, the size of the void decreases while the filling efficiency increases. Furthermore, the void formed during the underfilling flow stage was caused by the accelerated contact line jump at the bump entrance.

Practical implications

The filling progression enabled manufacturers to forecast the underfill flow front, as it advances through the flip-chip. Moreover, filling progression and filling efficiency could provide quantitative insights for the determination of void formations at any filling stages. The voiding formation mechanism enables the prompt formulation of countermeasures.

Originality/value

Both the filling progression and filling efficiency are new indicative parameters in quantifying the performance of the filling process while considering the reliability defects such as incomplete filling and voiding.

Details

Soldering & Surface Mount Technology, vol. 34 no. 4
Type: Research Article
ISSN: 0954-0911

Keywords

Article
Publication date: 4 September 2017

Fei Chong Ng, Mohamad Aizat Abas, MZ Abdullah, MHH Ishak and Gean Yuen Chong

This paper aims to present experimental and finite volume method (FVM)-based simulation studies on the scaling effect on the capillary contact angle and entrant pressure for a…

Abstract

Purpose

This paper aims to present experimental and finite volume method (FVM)-based simulation studies on the scaling effect on the capillary contact angle and entrant pressure for a three-dimensional encapsulation process of ball-grid array (BGA).

Design/methodology/approach

With the development of various sizes of BGA packages, the scaling effect of BGA model on capillary underfill (CUF) process is investigated together with the influences of different industrial standard solder bump arrangements and dispensing methods used as case study.

Findings

The experimental results agree well to the simulation findings with minimal deviation in filling time and similar flow front profiles for all setups. The results revealed that the capillary contact angle of flow front decreases in scale-up model with larger gap height observed and lengthens the encapsulation process. Statistical correlation studies are conducted and accurate regression equations are obtained to relate the gap height to the completion filling time and contact angle. CUF threshold capillary pressures were computed based on Leverett-J function and found to be increasing with the scale size of the package.

Practical implications

These statistical data provide accurate insights into the impact of BGA’s scale sizes to the CUF process that will be benefiting the future design of BGA package. This study provided electronic designers with profound understanding on the scaling effect in CUF process of BGA, which may be extended to the future development of miniature-sized BGA and multi-stack device.

Originality/value

This study relates the flow behaviour of encapsulant to its capillary contact angle and Leverett-J pressure threshold, in the CUF process of different BGA and dispensing conditions. To date, no research has been found to predict the threshold pressure on the gap between the chip and substrate.

Details

Soldering & Surface Mount Technology, vol. 29 no. 4
Type: Research Article
ISSN: 0954-0911

Keywords

1 – 10 of 97