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Filling efficiency of flip-chip underfill encapsulation process

Fei Chong Ng (School of Mechanical Engineering, Universiti Sains Malaysia, Minden, Malaysia)
Mohamad Aizat Abas (School of Mechanical Engineering, Universiti Sains Malaysia, George Town, Malaysia)
Mohd Zulkifly Abdullah (School of Mechanical Engineering, Universiti Sains Malaysia, Minden, Malaysia)

Soldering & Surface Mount Technology

ISSN: 0954-0911

Article publication date: 11 October 2019

Issue publication date: 17 January 2020

229

Abstract

Purpose

This paper aims to introduce a new indicative parameter of filling efficiency to quantify the performance and productivity of the flip-chip underfill encapsulation process. Additionally, the variation effect of the bump pitch of flip-chip on the filling efficiency was demonstrated to provide insight for flip-chip design optimization.

Design/methodology/approach

The filling efficiency was formulated analytically based on the conceptual spatial and temporal perspectives. Subsequently, the effect of bump pitch on filling efficiency was studied based on the past actual-scaled and current scaled-up underfill experiments. The latter scaled-up experiment was validated with both the finite volume method-based numerical simulation and analytical filling time model. Moreover, the scaling validity of scaled-up experiment was justified based on the similarity analysis of dimensionless number.

Findings

Through the scaling analysis, the current scaled-up experimental system is justified to be valid since the adopted scaling factor 40 is less than the theoretical scaling limit of 270. Furthermore, the current experiment was qualitatively well validated with the numerical simulation and analytical filling time model. It is found that the filling efficiency increases with the bump pitch, such that doubling the bump pitch would triple the efficiency.

Practical implications

The new performance indicative index of filling efficiency enables the package designers to justify the variation effect of underfill parameter on the overall underfill process. Moreover, the upper limit of scaling factor for scaled-up package was derived to serve as the guideline for future scaled-up underfill experiments.

Originality/value

The performance of underfill process as highlighted in this paper was never being quantified before in the past literatures. Similarly, the scaling limit that is associated to the scaled-up underfill experiment was never being reported elsewhere too.

Keywords

Acknowledgements

This work was partly supported by the following grants: Fundamental Research Grant Scheme (FRGS) (Grant number: FRGS/1/2019/TK03/USM/03/1) and Research University (RU) (Grant number: 8014071).

Citation

Ng, F.C., Abas, M.A. and Abdullah, M.Z. (2020), "Filling efficiency of flip-chip underfill encapsulation process", Soldering & Surface Mount Technology, Vol. 32 No. 1, pp. 10-18. https://doi.org/10.1108/SSMT-07-2019-0026

Publisher

:

Emerald Publishing Limited

Copyright © 2019, Emerald Publishing Limited

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