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The purpose of this paper is to predict a suitable paper substrate which has high capillary pressure with the tendency of subsequent fluid wrenching in onward direction for the fabrication of microfluidics device application.

The experiment has been done on the Whatman^TM grade 1, Whatman^TM chromatography and nitrocellulose paper samples which are made by GE Healthcare Life Sciences. The structural characterization of paper samples for surface properties has been done by scanning electron microscope and ImageJ software. Identification of functional groups on the surface of samples has been done by Fourier transform infrared analysis. A finite elemental analysis has also been performed by using the “Multiphase Flow in Porous Media” module of the COMSOL Multiphysics tool which combines Darcy’s law and Phase Transport in Porous Media interface.

Experimentally, it has been concluded that the paper substrate for flexible microfluidic device application must have large number of internal (intra- and interfiber) pores with fewer void spaces (external pores) that have high capillary pressure to propel the fluid in onward direction with narrow paper fiber channel.

Surface structure has a dynamic impact in paper substrate utilization in multiple applications such as paper manufacturing, printing process and microfluidics applications.

Power electronics are usually soldered to Al₂‐O₃ direct‐bond‐copper (DBC) substrates to increase thermal diffusivity, while at the same time increasing electrical isolation. However, soldering gives rise to inherent residual stresses and out‐of‐plane deformation. The purpose of this paper is to look at the effect of soldering processes of Al₂‐O₃ DBC substrates to copper plates and power electronics, on their thermal fatigue life and warpage.

A numerical thermo‐mechanical finite element model, using the Chaboche material model, was developed to identify the thermal plastic strains evolved during soldering of DBC substrates to copper plates and power electronics. The plastic strains in conjunction with established extremely low cycle fatigue life prediction model for ductile material were used to predict the number of soldering cycles to failure. The predicted out‐of‐plane deformation and number of soldering cycles to failures was compared to realistic tests.

Soldering processes drastically reduce the thermal fatigue life of DBC substrates, giving rise to thermal cracking and premature failure. In this study the soldering process considered gave rise to out‐of‐plane deformations, consequently reducing heat dispersion in soldered DBC substrate assemblies. Furthermore, soldering gave rise to interface cracking and failed after three soldering cycles. Numerical finite element models were developed and are in good agreement with the experimental tests results.

The influence of soldering processes of DBC substrates to copper plates and electronics on the thermal fatigue life should be taken into consideration when establishing the design life of DBC substrates. Finite element models can be utilised to optimize soldering processes and optimize the design of DBC substrates.

The effect of soldering processes on DBC substrates was studied. A numerical finite element model used for the prediction of design life cycle and out‐of‐plane deformation is proposed.

Due to increasing density and high demands on electrical and thermal performance, modern packages require alternative chip interconnection and substrate technologies. Flip‐chip (FC) bonding is a suitable method for high interconnection densities. Compared with wire bonding and TAB, FC provides the highest contact density. This is due to the possibility of using the whole chip surface for bondpads (area bumps). In this paper, an adapted FC technology on green tape ceramic substrates was investigated. In order to reduce the substrate costs, FC bonding was performed directly on the thick film metallisation without the application of thin film technology for the upper substrate layers. Two solder bump metallurgies: PbSn95/5 and Au/Sn solder bumps were applied for fluxless FC bonding on adapted substrate metallisations. Fluxless soldering is performed by single chip bonding and requires substrates with narrow planarity tolerances. An alternative method using a wet eutectic Au/Sn solder paste on the substrate and Au bumps permits the application of substrates with standard planarity tolerances used in thick film applications. A common reflow of all chips of a multichip module is possible. First reliability results of metallurgical analysis and of the mechanical and electrical behaviour of the FC contacts after thermal cycling are presented.

Strain gauges can be realised by printing and firing thick‐film resistors on ceramic substrates that are usually based on alumina. However, sensing elements made on some other substrates – tetragonal zirconia or stainless steel – would exhibit some improved characteristics, either due to a lower modulus of elasticity or a higher mechanical strength. As thick‐film resistors are developed for firing on alumina substrates their compatibility and possible interactions with other kinds of substrates have to be evaluated. The sheet resistivities and noise indices of the resistors were comparable, whereas the gauge factors were lower for the dielectric‐on‐steel substrates. The temperature coefficients of resistivity (TCR) of the resistors on the ZrO₂ and dielectric‐on‐steel substrates were higher than the TCRs on the alumina substrates, which was attributed to the higher thermal expansion coefficient of the tetragonal zirconia and the stainless steel.

A novel interconnect technology, introducing thin film on a laminate substrate base, is presented. A specially constructed laminate board is used as a substrate for the thin film build‐up process. The main characteristics of the laminate core substrate are the z‐axis electrical connections, the absence of holes in the substrate and the very flat nature of the top surface. As a result, the base substrate can be processed further in a thin film processing line. The manufacturing and properties of these substrates are discussed.

A new hybrid substrate technology for power electronic applications has been characterised by thermal resistance and mechanical stress measurements. The new substrate utilises thermal spray technology for deposition of dielectric layer and electrical conductors. The results are compared with the more established technology of alumina substrates with direct copper bonding (DCB) metallisation. Silicon test chips for thermal resistance and mechanical stress measurement were used for the characterisation. The experimental results were compared with finite element analysis and a reasonable agreement was found.

The purpose of this paper is to address the influence of deposition process parameters. The substrate heating mechanisms are also discussed.

Deposition duration, sputtering power, working gas pressure, and substrate heater temperature on substrate heating in the direct current (DC) magnetron sputtering deposition process were investigated.

Results from the experiments show that, in DC magnetron sputtering deposition process, substrate heating is largely influenced by the process parameters and conditions.

This paper usefully demonstrates that substrate heating effects can be minimized by adjusting and selecting the proper sputtering process parameters; the production cost can be reduced by employing a higher sputtering power, lower working gas pressure and shorter deposition duration.

This paper aims to present investigation on textured polyimide (PI) substrate for enhanced light absorption in flexible black silicon (bSi).

Flexible bSi with thickness of 60 µm is used in this work. To texture the PI substrate, copper-seeding technique is used. A copper (Cu) layer with a thickness of 100 nm is deposited on PI substrate by sputtering. The substrate is then annealed at 400°C in air ambient for different durations of 60, 90 and 120 min.

With 90 min of annealing, root mean square roughness as large as 130 nm, peak angle of 24° and angle distribution of up to 87° are obtained. With this texturing condition, the flexible bSi exhibits maximum potential short-circuit current density (J_max) of 40.33 mA/cm², or 0.45 mA/cm² higher compared to the flexible bSi on planar PI. The improvement is attributed to enhanced light scattering at the flexible bSi/textured PI interface. The findings from this work demonstrate that the optimization of the PI texturing via Cu-seeding process leads to an enhancement in the long wavelengths light absorption and potential J_max in the flexible bSi absorber.

Demonstrated enhanced light absorption and potential Jmax in flexible bSi on textured PI substrate (compared to planar PI substrate) by Cu-seeding with different annealing durations.

The electrodeposition of any metal over titanium substrates meets with many problems due to the formation of a non‐conductive layer of titanium oxide on the surface of substrates during the electroplating process. Trials were made to overcome these problems by the pre‐anodisation of titanium substrates in oxalic acid solution of concentration 100g/l, at high current density of 60‐95mA/cm^–2, and at ambient temperature. In these conditions, a thin, porous and conductive titanium oxide film can be obtained, which will then support electroplating processes. Rhodium metal was electrodeposited over the anodised titanium substrates from a bath consisting of Rh₂(SO₄)₃, 5.2g/l and H₂SO₄, 100g/l. At optimum conditions of electroplating, the rhodium electrodeposits were formed over the anodised titanium substrate with high adhesion, brightness and high current efficiency (92.05 per cent).

Printed flexible circuits that combined conventional silicon technology will enable the realisation of many value added products such as smart packaging for the fast moving consumer goods (FMCG) industry. This paper aims to describe an investigation into integrating silicon and printable circuits for the FMCG packaging industry and this would allow products with features such as brand protection, time temperature indicators, customer feedback and visual product enhancement. Responding to interest from the FMCG packaging industry, an investigation was carried out which investigated the printing conductive silver ink on common packaging substrates.

Standard IC mounting patterns were screen printed using two conductive silver materials (one high silver content traditional paste and one lower silver content gel polymer) to four plastic and three paper substrates which represent common FMCG substrates (HDPE, BOPP, PET and three paper substrates). Materials were characterised in terms of material rheology whereas prints were characterised through electrical performance and printed film topology.

There was a significant interaction between the substrate, silver ink formulation and the resultant line quality, line topology and conductivity. On paper substrates, the absorption of binder into the substrate resulted in denser silver packing and higher conductivity for the paste material. Higher conductivities were obtained on the substrates capable of withstanding higher curing temperatures. On the polymer substrates higher conductivity could be obtained by lower content silver materials due to the denser particle packing in the cured ink film as a result of its higher solvent/lower solids components.

Further work should examine the interactions for other printing processes commonly used in the FMCG industry such as rotogravure of flexography and should also examine nano particle materials. Further work should also address the mechanical adhesion of silicon logic on the substrates and bottlenecks in processing.

The lower silver content gel material potentially provides material cost reduction by a factor of between 4 and 7 for the same conductivity. The gel material also has potential for more uniform performance across all substrate types. Typically 3.1 Ω/cm resistance values are achieved on all substrates for 300 micron lines.

For those in the field of smart packaging the work has highlighted the interaction between silver materials and non PET/PEN substrates in flexible printed circuits. It has demonstrated the implications of rheology, substrate absorbency and materials processing temperature on circuit design. For those seeking printing process understanding it has provided further validation to support material transfer mechanisms in the screen printing process.