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The increasing economic importance and the number of born global firms make it worthwhile to study what leads to their success in the international market. To better understand this international business phenomenon, we conducted in‐depth interviews with managers, coupled with public database and Web site searches. Research propositions were developed based on an extensive qualitative method. The relationship between organizational culture, information technology capability, and performance is proposed in the context of born global firms, based on viewing the concept of IT capability from the resource‐based view. We further provide recommendations for managers, theoretical contributions and suggestions for future research.

This chapter begins with a reflection on the call for investigating how entrepreneurial competencies are developed (Bird, 1995) in the context of university-based entrepreneurship centers. Through clarifying the nature of entrepreneurial competencies and applying a social constructivist perspective of learning, it is proposed that effective nurturing of entrepreneurial competencies for university students through entrepreneurship centers shall be based on five key characteristics; namely, active experimentation, authenticity, social interaction, sense of ownership, and scaffolding support. The chapter contributes to the literature through establishing a link between entrepreneurship education and entrepreneurial competencies in the context of university-based entrepreneurship centers, which have become an increasingly popular way for promoting entrepreneurial development. The practical implications on nurturing entrepreneurs through entrepreneurship centers are discussed, together with the directions for further research. This chapter is designed as a refection upon Bird’s original article articulating the concept of entrepreneurial competencies. In this chapter, the author outlines how entrepreneurial competencies can be developed through education programs, specifically via entrepreneurship centers.

A new dual‐rail adiabatic logic family is proposed in this paper. Modified dual‐rail improved adiabatic pseudo domino logic with high throughput (MDIAPDL‐HT) is an improved adiabatic logic design aimed at low power and high throughput performance. The basic structure is the same as the MDIAPDL, but with a different clocking system. This results in power savings up to 95 percent compared to the static CMOS. It has higher throughput with a factor of about four compared to MDIAPDL and a factor of two compared to 4ϕ‐IAPDL.

Building on the entrepreneurship, marketing and strategic management literature, we propose a conceptual model to investigate the effects of entrepreneurial strategic posture (ESP), perceived environmental uncertainty and international diversifi cation strategy on performance. The ESP‐International diversification‐Performance relationship is investigated using a contingency framework. Entrepreneurial strategic posture is postulated to influence the use of international diversifi cation strategy of entrepreneurial fi rms. Moreover, perceived environmental uncertainty is hypothesized to strengthen the relationship between a firm’s entrepreneurial strategic posture and international diversification strategy, which ultimately affect the firm’s performance. Propositions for further empirical studies are provided in addition to managerial and theoretical contributions.

The number of MSMEs is very influential in economic growth, especially in developing countries. What is of concern to developing countries, although the number of MSMEs is increasing every year, they cannot develop in an increasingly competitive business environment. In this case, good business performance is needed to survive in this intense competition. This study tries to make a performance model of small-scale enterprises by finding out the effect of entrepreneurial competency variables and moderated by the variable competitive sphere and capability of organization. We use the partial least squares to confirm the theory and get answers about the influence between variables. Respondents of this study were 100 MSME owners in Bandung, Indonesia. The study's findings revealed that entrepreneurial competence had a significant influence both directly and indirectly on small firm performance. The variable of entrepreneurial competence provides the most powerful influence on the competitive sphere than organizational capability's moderating variable. Although the moderating variable of organizational capability is not as strong as the competitive sphere in influencing firm performance, it has a strong predictor (quality and flexibility).

Business plan writing seems the panacea to gain stakeholder legitimacy and financial backing. Our chapter explores the contributions and disconnections between business plan writing and the start-up process for incubated technology entrepreneurs. The study is set in the South East Enterprise Platform Programme (SEEPP), an incubator programme for technology graduate entrepreneurs in the South East of Ireland. Using a purposive sample of technology entrepreneurs in start-up mode, we took a qualitative approach consisting of content analysis of 40 business plans and in-depth interviews with 25 technology entrepreneurs. Our research found that writing a detailed business plan constrains the technology entrepreneur’s natural penchant for action, compelling them to focus on business plan writing rather than enactment. Technology entrepreneurs favour a market-led rather than funding-led operational level document to plan, and learn from, near-term activities using milestones.

The purpose of this paper is to examine the impact of external debt and corruption on economic growth in the selected five Sub-Saharan African (SSA) countries, from 1990 to 2015.

Panel unit root and panel cointegration tests are employed to test for stationarity of the series and the long-run relationship, respectively. Fully modified OLS and dynamic OLS techniques are also employed to examine the long-run coefficients of the variables of the model, as well as panel Granger causality test, in order to examine the direction of causality among the variables.

The results indicate that there is a negative relationship between external debt and economic growth, as well as a bi-directional causality between the two variables. The findings also indicate a positive relationship between corruption and economic growth, as well as a uni-directional causality running from economic growth through corruption.

The study recommends that the governments of the selected countries should address the menace of rising external debt through the adoption of other sources of capital for investment. Such include more openness of the economy for more capital, by easing restrictions on genuine imports and exports of valuable goods and services. It also suggests that the issue of corruption be tackled head-on, by such penalties that tend to make corruption less attractive.

While the relationship between economic growth and external debt, on the one hand, and corruption and economic growth, on the other hand, have received considerable attentions, the trio of external debt, corruption and economic growth have not been found combined in a model, to the best of the authors’ knowledge. Also, the countries under consideration, who jointly account for about 47 percent of the entire SSA countries’ stock of external debt, have not been jointly found in any recent panel studies involving the selected variables.

Besides combinational circuits, sequential circuits, for instance, flip‐flops, also play an important role in the design of digital systems. In this article, energy‐recovery/adiabatic flip‐flops based on improved PAL‐2N logic with complementary pass transistor logic (CPL) evaluation tree (C‐PAL) family will be described. HSPICE simulation results show that the proposed SR and JK flip‐flops are able to achieve significant power savings compared to the conventional CMOS flip‐flops, with operating frequencies from 50MHz to 250MHz. The supply voltages are scaled down from 5V to 2.5V in order to compare the power consumption with CMOS counterpart. In addition, a 4‐bit binary counter is designed to verify the functionality of the proposed flip‐flops.

An improved structure for adiabatic pseudo‐domino logic (APDL) family is presented in this paper. The modified dual‐rail improved APDL (MDIAPDL) exhibits lower power dissipation than the conventional static CMOS as shown in HSpice simulations. Comprehensive circuit simulations show that the MDIAPDL 4 bit shift register can recover over 95 per cent of the energy dissipated in conventional static CMOS 4 bit shift register.