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Following the endorsement of the new plans for this year's show at the last AGM, the initial stages of the promotional campaign for CEMEX 94 have been launched. The information packs and booking forms recently circulated to CEMA members have already elicited a good response with some 25 companies making stand reservations. As before, the show will be a mix of open sites and shell scheme. Over the next few weeks members will receive additional information covering show services, special packages and promotional opportunities. The support for the move back to the Pavilion Hall has been welcomed as an ideal opening to give CEMEX a separate ‘home’ at the NEC. In a statement released with the new publicity material for the show, Chairman Fred Thorns expressed his confidence and predicted that “..we will see a stronger economy, a full turnout of CEMA exhibitors showing a broad range of equipment and materials, and greatly increased activity throughout our industry”. Members who may not have seen the CEMEX information or would like to know more should contact: SCS Exhibitions Ltd, 212 London Road, North End, Portsmouth, Hampshire PO29JE. Telephone: (0705) 665133. Fax: (0705) 670036.

This article comprises Chapter 6 from the recently published book ‘An Engineer’s Guide to Flexible Circuit Technology by J. Fjelstad

Flexible circuits are ideally suited to solving the design demands of next generation electronics. The flexible circuit offers a number of advantages that are unavailable to those using more traditional, rigid type interconnection structures. A number of new applications for flexible circuits have been developed that may well provide a glimpse of what is yet to come in electronic packaging technology. These new applications embrace the whole spectrum of the electronics interconnection world from chip packaging to high density multilayer structures. Reviewed here are some of the more novel uses of the flex circuit for high performance electronic interconnection.

The purpose of this paper is to describe a novel method for the manufacture of aluminum rigid‐flex circuit assemblies without the use of solder.

The approach involves the use of an aluminum base material and the embedding of components, while avoiding the use of solder in the assembly process.

The new methods and proposed structures address the key manufacturing problems that have vexed users for many years, while simultaneously addressing the challenge of thermal management. They also offer the advantage of enhanced reliability by avoiding the need for high temperatures used in soldering.

While examples of the process and its benefits have been demonstrated, further work is ongoing to expand applicability.

The paper begins with an overview of previous work in this area and then moves on to what is currently being implemented via the new technology. A novel method is described for the creation of potentially more cost‐effective and reliable rigid flex assemblies, which would be suitable for use in a wide range of products, from consumer to high‐reliability automotive, military and aerospace.

The purpose of this paper is to provide a historical perspective and framework for appreciating the evolution of 3D interconnection technologies from past to present.

A literature and patent search was performed to find the origins of 3D interconnections to find and credit work that was performed in the early electronics industry which presaged the development of the current generation 3D solutions.

The origins of 3D interconnections have roots that date to the beginnings of electronic interconnections if the earlier solutions are viewed in proper perspective. For example, early telegraphy and telephony interconnections strung from pole to pole across large expanses of terrain were clearly 3D interconnections on a very macro scale but those solutions scaled down are not that dissimilar to what is being done today in some advanced interconnection technologies.

The pioneers of the electronics industry broke a trail which has been widened, paved and branched by all who have followed them. Granted that the branches have led to new high‐worth discoveries but acknowledging the past and taking instruction from it is important, even necessary, to assure that future developments do not continually “reinvent the wheel”.

The paper traces, in brief fashion, the history of 3D interconnections providing examples of solutions which predate some of the current generation solutions which appear, in some cases, quite similar to those developed or proposed nearly half century ago. Knowing the past is vital to understanding and shaping the future.

Several important factors are often neglected or forgotten by engineers and designers with respect to designing for cost‐effective manufacture of the different types of flexible printed circuits (FPCs). This paper discusses the various design features which influence the cost of FPC production, offers layout guidelines and considers the items affecting flexibility. Designing manufacturable products can lead to benefits such as reduced lead times, lower material costs, higher quality and increased yields.

“A patterned arrangement of printed wiring utilizing flexible base material with or without flexible coverlayers”. The balance of this brief article will hopefully serve to help the reader understand this remarkable interconnection technology and appreciate just how widely the technology can be applied.

To review the challenges confronting the electronics interconnection industry as it transitions into the gigahertz frequency range and to describe novel prospective solutions designed to circumvent the problems by means of alternative interconnection architectures while remaining within the confines of the existing manufacturing infrastructure.

The paper has been written in a manner so as to provide first a brief review of the history of interconnections as background reference, providing access and understanding to a broader readership of the significance of the area of investigation. From there, the paper describes the problems facing electronic circuit manufactures relative to the serious matter of assuring signal integrity of high speed interconnections. It then goes on to describe a general class of prospective solutions, which can be implemented through simple architectural changes in design and manufacture. Finally, the paper describes a prototype system which was fabricated using the concepts and the first‐order findings are provided.

From operation of the prototype system, it was found that the concepts, relative to PCB architectural changes prescribed in the paper are capable of delivering performance levels beyond what is accepted when using traditional interconnection modalities. The 10 Gbps backplane prototype has proved capable of sending a 100 mV peak‐to‐peak signal a distance of 75 cm through a two wire single differential pair which pass through two industry standard connectors. The signal generated has a ∼65 percent margin indicating it could go much further and determining the limits an object of future study. The modulation is standard NRZ. With only two wires there was no cross talk in the system, however, the next stage of investigation will consist of a multi‐device assembly to see what cross talk effect there might be, if any.

The chief value of the paper resides in its disclosure of novel approaches to electronic interconnection involving simple changes in circuit architectural structures which extend the signal performance limits of copper interconnections, well beyond present consensus expectations of industry. Moreover, the paper provides first experimental results of the technology in actual operation as proof of concept.

The concept of packaging integrated circuits while they are still in wafer form has captured the imagination of semiconductor manufacturers and packagers around the globe. One such concept, referred to as wide area vertical expansion (WAVE^TM) technology promises to provide a relatively easy method for cost effectively interconnecting ICs while still on the wafer. Moreover the fundamental technology is amenable to the production of “virtual wafers” where individual IC chips can be assembled en masse. The virtual wafer variation also allows for die shrink to occur, while the IC package footprint remains constant. The technology is based on concepts that allow for the mass assembly and production of compliant packages both directly on the wafer and in “virtual wafer” format where individual chips are bonded directly to the flexible pellicle. This paper examines this important new packaging technology concept in terms of the process and device and the implications and future directions the technology is likely to take.