Author and title index to volume 25, 1999

Citation

(1999), "Author and title index to volume 25, 1999", Circuit World, Vol. 25 No. 4. https://doi.org/10.1108/cw.1999.21725daf.005

Author and title index to volume 25, 1999

ABYS, J.A., see FAN, C.

ABYS, J.A., see ZHANG, Y.

B

BLAIR, A., see FAN, C.

BOYES, B., see GILLEO, K.

BRATIN, P., PAVLOV, M. and CHALYT, G., Surface evaluation of the silver finishes via sequential electrochemical reduction analysis (SERA), 1, p. 59.

BURGESS, L.W. and PAURI, F., Optimizing BGA to PCB interconnections using multi-depth laser drilled blind vias-in-pad, 2, p. 31.

C

CARANO, M., Performance and reliability issues for a graphite based direct metalization process, 3, p. 18.

CASTALDI, S., FRITZ, D. and SCHAEFFER, R., Limits of copper plating in high aspect ratio microvias, 2, p. 35.

CHALYT, G., see BRATIN, P.

CHANG, S.-C. and SHUBKIN, R.L., New normal-propyl bromide based cleaning technology for the electronic industry, 4, p. 17.

CHEN, T., see LAU, J.H.

CHOU, T.-Y., see LAU, J.H.

CLOUSER, S.J., see MERCHANT, H.D.

Conductive filament formation failure in a printed circuit board, ROGERS, K., HILLMAN, C., PECHT, M. and NACHBOR, S., 3, p. 6.

(The) constraints of vias and layers and their impact on PCB design strategy, PALMER, M. and WILLIAMS, D.J., 4, p. 22.

Controlling emissions stemming from the hot air solder leveling process, LEE, M., 4, p. 28.

CORBETT, S., see GILLEO, K.

D

DASGUPTA, A., see HILLMAN, C.

Design, analysis and measurement of the cost-effective substrate of a plastic ball grid array package -- NuBGA, LAU, J.H., CHEN, T. and CHOU, T.-Y., 2, p. 41.

DUSEK, R., see HILLMAN, C.

E

18 µm electrodeposited copper foil for flex fatigue applications, MERCHANT, H.D., MINOR, M.G. Jr, CLOUSER, S.J. and LEONARD, D.T., 1, p. 38.

EDWARDS, T., see HUGHES, C.

ESLAMBOLCHI, A., see MEI, Z.

Evaluation of Ni/Pd/Au as an alternative metal finish on PCB, MEI, Z. and ESLAMBOLCHI, A., 2, p. 18.

Experimental investigation of 35nm Nd:YAG laser ablation of RCCR in PCB, YUNG, W.K.C., LIU, J.S. and MAN, H.C., 3, p. 13.

F

FAN, C., ABYS, J.A. and BLAIR, A., Gold and aluminum wire bonding to palladium surface finishes, 3, p. 23.

FJELSTAD, J., Flexible circuitry -- technology background and important fundamental issues, 2, p. 6.

FJELSTAD, J., KARAVAKIS, K. and HABA, B., Manufacture of high density interconnection substrates by co-lamination of inner layers and programmed interconnection joining layers, 3, p. 9.

Flexible circuitry -- technology background and important fundamental issues, FJELSTAD, J., 2, p. 6.

FRITZ, D., see CASTALDI, S.

G

GILLEO, K., BOYES, B., CORBETT, S., LARSON, G. and PRICE, D., High volume, low cost flip chip assembly on polyester flex, 2, p. 11.

Gold and aluminum wire bonding to palladium surface finishes, FAN, C., ABYS, J.A. and BLAIR, A., 3, p. 23.

H

HABA, B., see FJELSTAD, J.

High volume, low cost flip chip assembly on polyester flex, GILLEO, K., BOYES, B., CORBETT, S., LARSON, G. and PRICE, D., 2, p. 11.

HILLMAN, C., ROGERS, K., DASGUPTA, A., PECHT, M., DUSEK, R. and LORENCE, B., Solder failure mechanisms in single-sided insertion-mount printed wiring boards, 3, p. 28.

HILLMAN, C., see ROGERS, K.

HUGHES, C., WILLIAMS, D. and EDWARDS, T., An understanding of the structure and geography of the subcontract PCB industry in the UK, 1, p. 55.

J

JOHNSON, R.W., WANG, V. and PALMER, M., Thermal cycle reliability of solder joints to alternate plating finishes, 2, p. 27.

K

KARAVAKIS, K., see FJELSTAD, J.

L

LADHAR, H., see YEE, S.

LARSON, G., see GILLEO, K.

LAU, J.H., CHEN, T. and CHOU, T.-Y., Design, analysis and measurement of the cost-effective substrate of a plastic ball grid array package -- NuBGA, 2, p. 41.

LEE, M., Controlling emissions stemming from the hot air solder leveling process, 4, p. 28.

LEONARD, D.T., see MERCHANT, H.D.

Limits of copper plating in high aspect ratio microvias, CASTALDI, S., FRITZ, D. and SCHAEFFER, R., 2, p. 35.

LIU, J.S., see YUNG, W.K.C.

LORENCE, B., see HILLMAN, C.

M

MAN, H.C., see YUNG, W.K.C.

Manufacture of high density interconnection substrates by co-lamination of inner layers and programmed interconnection joining layers, FJELSTAD, J., KARAVAKIS,K. and HABA, B., 3, p. 9.

MARTIN, K.P., see PATEL, C.S.

MEI, Z. and ESLAMBOLCHI, A., Evaluation of Ni/Pd/Au as an alternative metal finish on PCB, 2, p. 18.

MEINDL, J.D., see PATEL, C.S.

MERCHANT, H.D., MINOR, M.G. Jr, CLOUSER, S.J. and LEONARD, D.T., 18 µm electrodeposited copper foil for flex fatigue applications, 1, p. 38.

MINOR, M.G. Jr, see MERCHANT, H.D.

N

NACHBOR, S., see ROGERS, K.

NAWA, K. and OHKITA, M., A new small CTE system from COPNA resin/E-glass fabrics, 1, p. 47.

New normal-propyl bromide based cleaning technology for the electronic industry, CHANG, S.-C. and SHUBKIN, R.L., 4, p. 17.

(A) new small CTE system from COPNA resin/E-glass fabrics, NAWA, K. and OHKITA, M., 1, p. 47.

O

OHKITA, M., see NAWA, K.

Optimal printed wiring board design for high I/O density chip size packages, PATEL, C.S., MARTIN, K.P. and MEINDL, J.D., 4, p. 25.

Optimizing BGA to PCB interconnections using multi-depth laser drilled blind vias-in-pad, BURGESS, L.W. and PAURI, F., 2, p. 31.

(An) overview of surface finishes and their role in printed circuit board solderability and solder joint performance, VIANCO, P.T., 1, p. 6.

P

PALMER, M. and WILLIAMS, D.J., The constraints of vias and layers and their impact on PCB design strategy, 4, p. 22.

PALMER, M., see JOHNSON, R.W.

PATEL, C.S., MARTIN, K.P. and MEINDL, J.D., Optimal printed wiring board design for high I/O density chip size packages, 4, p. 25.

PAURI, F., see BURGESS, L.W.

PAVLOV, M., see BRATIN, P.

PECHT, M., see HILLMAN, C.

PECHT, M., see ROGERS, K.

Performance and reliability issues for a graphite based direct metalization process, CARANO, M., 3, p. 18.

PRICE, D., see GILLEO, K.

R

Reliability comparison of different surface finishes on copper, YEE, S. and LADHAR, H., 1, p. 25.

ROGERS, K., HILLMAN, C., PECHT, M. and NACHBOR, S., Conductive filament formation failure in a printed circuit board, 3, p. 6.

ROGERS, K., see HILLMAN, C.

S

SCHAEFFER, R., see CASTALDI, S.

SHUBKIN, R.L., see CHANG, S.-C.

Solder failure mechanisms in single-sided insertion-mount printed wiring boards, HILLMAN, C., ROGERS, K., DASGUPTA, A., PECHT, M., DUSEK, R. and LORENCE, B., 3, p. 28.

Surface evaluation of the silver finishes via sequential electrochemical reduction analysis (SERA), BRATIN, P., PAVLOV, M. and CHALYT, G., 1, p. 59.

T

Thermal cycle reliability of solder joints to alternate plating finishes, JOHNSON, R.W., WANG, V. and PALMER, M., 2, p. 27.

U

(An) understanding of the structure and geography of the subcontract PCB industry in the UK, HUGHES, C., WILLIAMS, D. and EDWARDS, T., 1, p. 55.

(A) unique electroplating tin chemistry, ZHANG, Y. and ABYS, J.A., 1, p. 30.

Use of Organic Metal to enhance the operating window and solderability of immersion tin, WESSLING, B., 4, p. 8.

V

VIANCO, P.T., An overview of surface finishes and their role in printed circuit board solderability and solder joint performance, 1, p. 6.

W

WANG, V., see JOHNSON, R.W.

WESSLING, B., Use of Organic Metal to enhance the operating window and solderability of immersion tin, 4, p. 8.

WILLIAMS, D., see HUGHES, C.

WILLIAMS, D.J., see PALMER, M.

Y

YEE, S. and LADHAR, H., Reliability comparison of different surface finishes on copper, 1, p. 25.

YUNG, W.K.C., LIU, J.S. and MAN, H.C., Experimental investigation of 35nm Nd:YAG laser ablation of RCC^R in PCB, 3, p. 13.

Z

ZHANG, Y. and ABYS, J.A., A unique electroplating tin chemistry, 1, p. 30.