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Traditional level inverter technology has drawbacks in the aspect of Total harmonic distortion (THD) and switching losses for higher frequencies. Due to these drawbacks, two-level inverters have become unprofitable for high-power applications. Multilevel inverters (MLIs) are used to enhance the output waveform characteristics (i.e. low THD) and to offer various inverter topologies and switching methods.

MLIs are upgraded versions of two-level inverters that offer more output levels in current and voltage waveforms while lowering the dv/dt and di/dt ratios. This paper aims to review and compare the different topologies of MLI used in high-power applications. Single and multisource MLI's working principal and switching states for each topology are demonstrated and compared. A Simulink model system integrated using detailed circuit simulations in developed in MATLAB®–Simulink program. In this system, a constant voltage source connected to MLI to feed asynchronous motor with squirrel cage rotor type is used to demonstrate the efficacy of the MLI under different varying speed and torque conditions.

MLI has presented better control and good range of system parameters than two-level inverter. It is suggested that the MLIs like cascade-five-level and NPC-five-level have shown low current harmonics of around 0.43% and 1.87%, respectively, compared to two-level inverter showing 5.82%.

This study is the first of its kind comparing the different topologies of single and multisource MLIs. This study suggests that the MLIs are more suitable for high-power applications.

High packaging density in the present VLSI era builds an acute power crisis, which limits the use of MOSFET device as a constituent block in CMOS technology. This leads researchers in looking for alternative devices, which can replace the MOSFET in CMOS VLSI logic design. In a quest for alternative devices, tunnel field effect transistor emerged as a potential alternative in recent times. The purpose of this study is to enhance the performances of the proposed device structure and make it compatible with circuit implementation. Finally, the performances of that circuit are compared with CMOS circuit and a comparative study is made to find the superiority of the proposed circuit with respect to conventional CMOS circuit.

Silicon–germanium heterostructure is currently one of the most promising architectures for semiconductor devices such as tunnel field effect transistor. Analytical modeling is computed and programmed with MATLAB software. Two-dimensional device simulation is performed by using Silvaco TCAD (ATLAS). The modeled results are validated through the ATLAS simulation data. Therefore, an inverter circuit is implemented with the proposed device. The circuit is simulated with the Tanner EDA tool to evaluate its performances.

The proposed optimized device geometry delivers exceptionally low OFF current (order of 10^−18 A/um), fairly high ON current (5x10^−5 A/um) and a steep subthreshold slope (20 mV/decade) followed by excellent ON–OFF current ratio (order of 10^13) compared to the similar kind of heterostructures. With a very low threshold voltage, even lesser than 0.1 V, the proposed device emerged as a good replacement of MOSFET in CMOS-like digital circuits. Hence, the device is implemented to construct a resistive inverter to study the circuit performances. The resistive inverter circuit is compared with a resistive CMOS inverter circuit. Both the circuit performances are analyzed and compared in terms of power dissipation, propagation delay and power-delay product. The outcomes of the experiments prove that the performance matrices of heterojunction Tunnel FET (HTFET)-based inverter are way ahead of that of CMOS-based inverter.

Germanium–silicon HTFET with stack gate oxide is analytically modeled and optimized in terms of performance matrices. The device performances are appreciable in comparison with the device structures published in contemporary literature. CMOS-like resistive inverter circuit, implemented with this proposed device, performs well and outruns the circuit performances of the conventional CMOS circuit at 45-nm technological node.

The purpose of this paper is to track the maximal power of wind energy conversion system (WECS) and enhance the search capability for WECS maximum power point tracking (MPPT).

The hybrid technique is the combination of tunicate swarm algorithm (TSA) and radial basis function neural network.

TSA gets input parameters from the rectifier outputs such as rectifier direct current (DC) voltage, DC current and time. From the input parameters, it enhances the reduced fault power of rectifier and generates training data set based on the MPPT conditions. The training data set is used in radial basis function. During the execution time, it produces the rectifier reference DC side voltage that is converted to control pulses of inverter switches.

Finally, the proposed method is executed in MATLAB/Simulink site, and the performance is compared with different existing methods like particle swarm optimization algorithm and hill climb searching technique. Then the output illustrates the performance of the proposed method and confirms its capability to solve issues.

The purpose of this paper is to develop a load detection method for domestic induction cooktops. The solution aims to minimize its impact in the converter power transmission while enabling the estimation of the equivalent electrical parameters of the load. This method is suitable for a multi-output resonant inverter topology with shared power devices.

The considered multi-output converter presents power devices that are shared between several loads. Thus, applying load detection methods in the literature requires a halt in the power transfer to ensuring safe operation. The proposed method uses a complementary short-voltage pulse to excite the induction heating (IH) coil without stopping the power transfer to the remaining IH loads. With the current through the coil and the analytical equations, the equivalent inductance and resistance of the load is estimated. The precision of the method has been evaluated by simulation, and experimental results are provided.

The measurement of the current through the induction coil as a response to a short-time single-pulse voltage variation provides enough information to estimate the load equivalent parameters, allowing to differentiate between no-load, non-suitable IH load and suitable IH load situations.

The proposed method provides a solution for load detection without requiring additional circuitry. It aims for low power transmission to the load and ensures zero-voltage switching and reduced peak current even in no-load cases. Moreover, the proposed solution is extensible to less complex converters, as the half bridge.

Induction heating processes need to adapt to complex geometries or variable processes that require a high degree of flexibility in the induction heating setup. This is usually done using complex inductors or adaptable resonant tanks, which leads to costly and constrained implementations. This paper aims to propose a multi-level, versatile power supply able to adapt the output to the required induction heating process.

This paper proposes a versatile multilevel topology able to generate versatile output waveforms. The methodology followed includes simulation of the proposed architecture, design of the power electronics, control and magnetic elements and laboratory tests after building a 10-level prototype.

The proposed converter has been designed and tested using an experimental prototype. The designed generator is able to operate at 1 kVpp and 100 A at 250 kHz, proving the feasibility of the proposed approach.

The proposed converter enables versatile waveform generation, enabling advanced tests and processes on induction heating system. The proposed system allows for multifrequency generation using a single inductor and converter, or advanced tests for inductive and capacitive components used on induction heating systems. Unlike previous multifrequency proposals, the proposed generator enables a significantly improved versatility in terms of operational frequency and amplitude in a single converter.

The purpose of this paper aims to design a robust wind turbine emulator (WTE) based on a three-phase induction motor (3PIM).

The 3PIM is driven by a soft voltage source inverter (VSI) controlled by a specific space vector modulation. By adjusting the appropriate vector sequence selection, the desired VSI output voltage allows a real wind turbine speed emulation in the laboratory, taking into account the wind profile, static and dynamic behaviors and parametric variations for theoretical and then experimental analysis. A Mexican hat profile and a sinusoidal profile are therefore used as the wind speed system input to highlight the electrical, mechanical and electromagnetic system response.

The simulation results, based on relative error data, show that the proposed reactive power control method effectively estimates the flux and the rotor time constant, thus ensuring an accurate trajectory tracking of the wind speed for the wind emulation application.

The proposed architecture achieves its results through the use of mathematical theory and WTE topology combine with an online adaptive estimator and Lyapunov stability adaptation control methods. These approaches are particularly relevant for low-cost or low-power alternative current (AC) motor drives in the field of renewable energy emulation. It has the advantage of eliminating the need for expensive and unreliable position transducers, thereby increasing the emulator drive life. A comparative analysis was also carried out to highlight the online adaptive estimator fast response time and accuracy.

A low power flip-flop circuit is designed for energy-efficient devices. Digital sequential circuits are in huge demand because every processor has most of the parts of digital circuit. The sequential circuits consist of a basic data storing element, a latch is used to store single bit data. The flip-flop takes a sufficient portion of the total chip area and overall power consumption as well. This study aims to the low power energy-efficient applications like laptops, mobile phones and palmtops.

This paper proposes a new type of flip-flop that consists of the only 16 transistors with a single-phase clock. The flip-flop has two blocks, master and slave latch. In this design, the authors have focused on only master latch, which includes a level restoring circuit. It is used to help the master latch in data retention process. The latch circuit has two inverters in back-to-back arrangement. The proposed flip-flop is implemented on 65 nm complementary metal oxide semiconductor technology using Cadence Virtuoso environment and compared with other reported flip-flops.

The proposed flip-flop architecture outperformed the peak percentage, i.e. 79.25% as compared to transmission gate flip-flop and a minimum of 20.02% compared to 18 T true single phase clocking (TSPC) improvement in terms of power. It also improved C to Q delay and power delay product. In addition, by reducing the number of transistors the total area of the proposed flip-flop is reduced by a minimum of 13.76% with respect to 18TSPC and existing flip-flop. For reliability checking the Monte Carlo simulation is performed for thousand samples and it is compared with the recently reported 18TSPC flip-flop.

This work is tested by using a test circuit with a load capacitor of 0.2 fF. The proposed work uses a new topology to work as master-slave. Power consumption of this technique is very less and it is best suitable for low power applications. This circuit is working properly up to 2 GHz frequency.

Islanding detection has become a serious concern due to the extensive integration of renewable energy sources. The non-detection zone (NDZ) and system-specific applicability, which are the two major issues with the islanding detection methods, are addressed here. The purpose of this paper is to devise an islanding detection method with zero NDZ and, which will be applicable to all types of renewable energy sources using the sequence components of the point of common coupling voltage.

Here, a parameter using the sequence components is derived to devise an islanding detection method. The parameter derived from the sequence components of point of common coupling voltage is analysed using wavelet transform. Various operating conditions, such as islanding and non-islanding, are considered for several test systems to evaluate the performance of the proposed method. All the simulations are carried out in Simulink/MATLAB environment.

The results showed that the proposed method has zero NDZ for both inverter- and synchronous generator-based renewable energy sources. In addition, the proposed method works satisfactorily as per the IEEE 1547 standards requirement.

Performance of the proposed method has been tested in several test systems and is found to be better than some conventional methods.

The primary aim of this paper is to present a novel design approach for a ring voltage-controlled oscillator (VCO) suitable for L-band applications, whose oscillation frequency is less sensitive to power supply variations. In a few decades, with the advancement of modern wireless communication equipment, there has been an increasing demand for low-power and robust communication systems for longer battery life. A sudden drop in power significantly affects the performance of the VCO. Supply insensitive circuit design is the backbone of uninterrupted VCO performance. Because of their important roles in a variety of applications, VCOs and phase locked loops (PLLs) have been the subject of significant research for decades. For a few decades, the VCO has been one of the major components used to provide a local frequency signal to the PLL.

First, this paper chose to present recent developments on implemented techniques of ring VCO design for various applications. A complementary metal oxide semiconductor (CMOS)-based supply compensation technique is presented, which aims to reduce the change in oscillation frequency with the supply. The proposed circuit is designed and simulated on Cadence Virtuoso in 0.18 µm CMOS process under 1.8 V power supply. Active differential configuration with a cross-coupled NMOS structure is designed, which eliminates losses and negates supply noise. The proposed VCO is designed for excellent performance in many areas, including the L-band microwave frequency range, supply sensitivity, occupied area, power consumption and phase noise.

This work provides the complete design aspect of a novel ring VCO design for the L-band frequency range, low phase noise, low occupied area and low power applications. The maximum value of the supply sensitivity for the proposed ring VCO is 1.31, which is achieved by changing the VDD by ±0.5%. A tuning frequency range of 1.47–1.81 GHz is achieved, which falls within the L-band frequency range. This frequency range is achieved by varying the control voltage from 0.0 to 0.8 V, which shows that the proposed ring VCO is also suitable for low voltage regions. The total power consumed by the proposed ring VCO is 14.70 mW, a remarkably low value using this large transistor count. The achievable value of phase noise is −88.76 dBc/Hz @ 1 MHz offset frequency, which is a relatively small value. The performance of the proposed ring VCO is also evaluated by the figure of merit, achieving −163.13 dBc/Hz, which assures the specificity of the proposed design. The process and temperature variation simulations also validate the proposed design. The proposed oscillator occupied an extremely small area of only 0.00019 mm² compared to contemporary designs.

The proposed CMOS-based supply compensation method is a unique design with the size and other parameters of the components used. All the data and results obtained show its originality in comparison with other designs. The obtained results are preserved to the fullest extent.

The purpose of this paper is to propose a new method that allows to compare the magnetic pressures of different pulse width modulation (PWM) strategies in a fast and efficient way.

The voltage harmonics are determined using the double Fourier integral. As for current harmonics and waveforms, a new generic model based on the Park transformation and a dq model of the machine was established taking saturation into consideration. The obtained analytical waveforms are then injected into a finite element software to compute magnetic pressures using nodal forces.

The overall proposed method allows to accelerate the calculations and the comparison of different PWM strategies and operating points as an analytical model is used to generate current waveforms.

While the analytical expressions of voltage harmonics are already provided in the literature for the space vector pulse width modulation, they had to be calculated for the discontinuous pulse width modulation. In this paper, the obtained expressions are provided. For current harmonics, different models based on a linear and a nonlinear model of the machine are presented in the referenced papers; however, these models are not generic and are limited to the second range of harmonics (two times the switching frequency). A new generic model is then established and used in this paper after being validated experimentally. And finally, the direct injection of analytical current waveforms in a finite element software to perform any magnetic computation is very efficient.