Search results

The purpose of this paper is to present a clear picture of the challenges of micro drill bit and the developments of novel micro‐drill bits for flexible circuit boards, environmental‐friendly printed circuit boards (PCBs), high aspect ratio drill bit and ultra‐small micro drill bit, as well as the developments of geometry design of micro drill bit.

The paper details the developments trend and challenges of micro drill and PCBs first. Then the current research status of novel micro drill bits for flexible circuit boards, environmental‐friendly PCBs, high aspect ratio drill bit, ultra‐small micro drill bit are described. Finally, the developments of geometry design and drilling process are reviewed.

To achieve excellent performance for drilling flexible PCB, a large helical angle, large flute/land ratio and small web thickness that guarantee the sharp evacuation capability, are adopted in drill bit design. A small helix angle and an appropriate primary face angle are employed for drill bit to process environmental‐friendly printed circuit boards. It is beneficial to implement big helix angle, small primary face angles and small point angles in the design of ultra‐small micro drill bit. An optimum web thickness and step feed should be taken into consideration in high aspect ratio drill bits design.

The paper reviews different solutions of micro drill bits for the state‐of‐the‐art PCB and the developments of geometry design of drill bit for printed circuit boards.

The purpose of this paper is to present a system for accurately measuring drilling force in the printed circuit board micro drilling process and to characterize the drilling force to provide a better understanding of the micro drilling process.

The drilling force measurement system was established first. Then the drilling force in printed circuit board micro drilling process was characterized experimentally. In particular, the drilling forces in drilling halogen‐free and lead‐free assembly compatible printed circuit boards and the drilling force characteristics in ultra small hole drilling were investigated.

A drilling force measurement system, with the key component of a KISTLER 9256C2 dynamometer, can accurately measure the drilling forces in the printed circuit board micro drilling process. The micro drilling process can be characterized by drilling force. Meanwhile, drilling force is very sensitive to drill breakage and drilling force can be utilized to detect drill breakage in the micro drilling process.

The paper presents a system for accurately measuring the drilling force. Drilling force provides fundamental information for the optimal design of micro drill bits. Drilling force can also characterize the micro drilling process, especially the ultra small hole micro drilling process.

The purpose of this paper is to evaluate the lead‐free solder joint reliability of a variety of surface mount components assembled onto printed circuit boards (PCBs) under a number of different tests.

Lead‐free solder with a composition of Sn96.5‐Ag3.0‐Cu0.5 was used in a surface mount reflow process. Different types of surface mount dummy components with a daisy chain, such as CBGAs, BGAs, PLCCs, CSPs, and QFNs, were assembled onto PCBs. Both the mechanical and thermo‐mechanical reliability of the solder joints were evaluated by several tests. The experiments included package shear, package pull, three‐point bending and accelerated thermal cycling testing for 2,000 cycles. The packages were examined by X‐ray and C‐SAM before the reliability tests were carried out. The maximum load and the corresponding load‐displacement curve were recorded in the mechanical test.

The results from the mechanical tests show the major failure mode is on the copper pad. Weibull analysis shows that the characteristic lives of most packages are between 1,100 and 2,400 cycles. For the CBGA, the characteristic life of 96 cycles is relatively short, due to the serious CTE mismatch. Cross‐section inspection shows failures occur at the solder joint. Copper pad failure is also observed.

This paper provides both the mechanical and thermal‐mechanical reliability of lead‐free solder joints. The experimental data are very useful in the lead‐free SMT industries.

The purpose of this study was the use of embedded components technology and innovative concepts of the printed circuit board (PCB) for electronic modules containing field-programmable gate array (FPGA) devices with a large number of pins (e.g. Virtex 6, FF1156/RF1156 package, 1,156 pins).

In the multi-layered boards, embedded passive components that support FPGA device input/output (I/O), such as blocking capacitors and pull-up resistors, were used. These modules can be used in rapid design of electronic devices. In the study, the MC16T FaradFlex material was used for the inner capacitive layer. The Ohmega-Ply RCM 25 Ω/sq material was used to manufacture pull-up resistors for high-frequency pins. The embedded components have been connected to pins of the FPGA component by using plated-through holes for capacitors and blind vias for resistors. Also, a technique for a board-to-board joining, by using castellated terminations, is described.

The fully functional modules for assembly of the FPGA were manufactured. Achieved resistance of embedded micro resistors, as small as the smallest currently used surface-mount device components (01005), was below required tolerance of 10 per cent. Obtained tolerance of capacitors was less than 3 per cent. Use of embedded components allowed to replace the pull-up resistors and blocking capacitors and shortens the signal path from the I/O of the FPGA. Correct connection to the castellated terminations with a very small pitch was also obtained. This allows in further planned studies to create a full signal distribution system from the FPGA without the use of unreliable plug connectors in aviation and space technology.

This study developed and manufactured several innovative concepts of signal distribution from printed circuit boards. The signal distribution solutions were integrated with embedded components, which allowed for significant reduction in the signal path. This study allows us to build the target object that is the module for rapid design of the FPGA device. Usage of a pre-designed module would lessen the time needed to develop a FPGA-based device, as a significant part of the necessary work (mainly designing the signal and power fan-out) will already be done during the module development.

Examines the tenth published year of the ITCRR. Runs the whole gamut of textile innovation, research and testing, some of which investigates hitherto untouched aspects. Subjects discussed include cotton fabric processing, asbestos substitutes, textile adjuncts to cardiovascular surgery, wet textile processes, hand evaluation, nanotechnology, thermoplastic composites, robotic ironing, protective clothing (agricultural and industrial), ecological aspects of fibre properties – to name but a few! There would appear to be no limit to the future potential for textile applications.

Outlines and comments on the waste electrical and electronic equipment and the restriction on the use of hazardous substances in electrical and electronic equipment directives, which have recently become law.

This paper aims to present a review of the recent developments in vapour phase soldering (VPS) technology. This study focuses on the following topics: recent developments of the technology, i.e. soft and vacuum VPS; measurement and characterization methods of vapour space, i.e. temperature and pressure; numerical simulation of the VPS soldering process, i.e. condensate layer and solder joint formation; and quality and reliability studies of the solder joints prepared by VPS, i.e. void content and microstructure of the solder joints.

This study was written according to the results of a wide literature review about the substantial previous works in the past decade and according to the authors’ own results.

Up to now, a part of the electronics industry believes that the reflow soldering with VPS method is a significant alternative of convection and infrared technologies. The summarized results of the field in this study support this idea.

This literature review provides engineers and researchers with understanding of the limitations and application possibilities of the VPS technology and the current challenges in soldering technology.

This paper summarizes the most important advantages and disadvantages of VPS technology compared to the other reflow soldering methods, as well as points out the necessary further developments and possible research directions.

Sn‐Zn based lead free solders with a melting temperature around 199°C are an attractive alternative to the conventional Sn‐Pb solder and the addition of bismuth improves its wetability. Whilst lead‐free soldering with Sn‐8Zn‐3Bi has already been used in the electronics assembly industry, it is necessary to study its low cycle fatigue properties since such data have not been reported up to now.

In this study, displacement‐controlled low cycle fatigue testing of Sn‐8Zn‐3Bi and Sn‐37Pb solder joints was done on lap shear samples. The test amplitude was varied whilst the frequency was kept constant at 0.2 Hz and failure was defined as a 50 per cent load reduction. Finite element (FE) modelling was used for analysis and the results were compared to the experimental data.

The microstructure of the Sn‐8Zn‐3Bi solder showed a mixed phase of small cellular‐shaped and coarser needle‐shaped areas. Au‐Zn intermetallic compounds were observed near the interface from the SEM‐EDS observation. The average lifetime for the Sn‐8Zn‐3Bi solder joints was 17 per cent longer compared to the Sn‐37Pb solder joints. The cross section observation indicated that the fatigue cracks propagated along the interface between the solder bulk and the Au/Ni layer. The locations of maximum equivalent stress from the FE simulation were found to be at the two opposite corners of the solder joints, coinciding with the experimental observations of crack initiation.

This is believed to be the first time, the low cycle fatigue properties of Sn‐8Zn‐3Bi solder have been reported.

A new under bump metallurgy (UBM) solution consisting of the TiW‐, Au‐ and Ni‐layers for solder flip chip applications has been developed. The metallurgy, being based on the well‐known TAB metallisation procedure, was modified by producing the galvanic nickel layer on the top of the Au‐TiW metallisation. Nickel is needed between high Sn liquid solder bumps and the Au layer to prevent fast and extensive dissolution of thin Cu or Au layers and consequently excessive intermetallic formation. The flip chip joints were manufactured, employing both the 60Sn40Pb‐ and pure Sn‐bumped chips together with the new UBM, which is relatively easy to implement into volume production. The different ageing tests demonstrated that reliable joints can be produced by using the UBM. On the basis of the results obtained the new UBM was found to be a significant improvement in the production of reliable flip chip joints.