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Driven by the demand for higher density in electronic packaging, each signal plane of printed wiring board must accommodate more conductors. As a result, conductor width is becoming narrower each year. This chapter reviews some of the important steps of forming finer line conductors in printed wiring boards, such as surface preparation, plating/etching, photo‐exposure, automatic optical inspection, etc.

Thick film screen printing technology is able to reach a pitch of 250 μm. In an attempt to achieve lower values, two approaches have been developed so far. Both are based on the combination of screen printing as a deposition technique and photolithography for the patterning. The first approach uses photoimageable conductor and dielectric pastes; the second is based on photoimageable dielectric and etching of the fired conductor. In order to obtain a full characterisation of both processes, a test module was designed and manufactured by using the first process and identical test modules were provided by the supplier using the second technology. The design of the test module is based on a two‐layer interconnection pattern including structures for testing cross‐overs, via interconnections with various resolutions (down to 50 μm via size), in order to investigate the limits of these technologies. This paper gives a comparison of these two approaches based on the results of electrical and mechanical measurements performed on both sets of the test modules. Electrical parameters and resolution data are discussed for both processes. The chip and wire assembly method is evaluated to prequalify the technology as an advanced MCM‐C technology for telecoms applications. Finally, the results of reliability tests (humidity ageing and burn‐in) are presented.

Surface insulation, electrochemical migration and various other insulation resistances are terms which are often glibly used, sometimes even incorrectly. This paper categorises different types of insulation resistance and catalogues about twenty practical applications of insulation resistance measurement, each with its ideal general conditions of measurement (test voltage, bias voltage, bias polarity, test voltage period, test frequency, test duration, temperature, humidity, test pattern type, test pattern dimensions, voltage gradients, tolerances, etc.) This description is independent of any of the nearly forty known, often contradictory, standards, most of which no longer correspond to the practical printed circuit or assembly of today. Also discussed are the different technologies of insulation resistance measurement, starting with the original non‐electronic ‘Megger®’ types through to modern laboratory electrometers and, finally, instrumentation specific to the practical measurement of printed circuit insulation resistances, including static and dynamic types. The importance of automatic statistical analyses is emphasised, especially with production testing as well as qualification procedures. This paper is aimed not only at those wishing to learn what modern insulation resistance testing is all about, but also at experienced persons wanting to marshall their thoughts about the fundamental meanings of insulation testing for different applications and specifications.

In the past 15 years stretchable electronic circuits have emerged as a new technology in the domain of assembly, interconnections and sensor circuits and assembly technologies. In the meantime a wide variety of processes with the use of many different materials have been explored in this new field. The purpose of the current contribution is for the authors to present an approach for stretchable circuits which is inspired by conventional rigid and flexible printed circuit board (PCB) technology. Two variants of this technology are presented: stretchable circuit board (SCB) and stretchable mould interconnect (SMI).

Similarly as in PCB 17 or 35 μm thick sheets of electrodeposited or rolled‐annealed Cu are structured to form the conductive tracks, and off‐the‐shelf, standard packaged, rigid components are assembled on the Cu contact pads using lead‐free solder materials and reflow processes. Stretchability is obtained by shaping the Cu tracks not as straight lines, like in normal PCB design, but as horseshoe shaped meanders. Instead of rigid or flexible board materials, elastic materials, predominantly PDMS (polydimethylsiloxane), are used to embed the conductors and the components, thus serving as circuit carrier. The authors include some mechanical modeling and design considerations, aimed at the optimization of the build‐up and combination of elastic, flexible and rigid materials towards minimal stress and maximum mechanical reliability in the structures. Furthermore, details on the two production processes are given, reliability findings are summarised, and a number of functional demonstrators, realized with the technologies, are described.

Key conclusions of the work are that: supporting the metal meanders with a flexible carrier prior to embedding in an elastic substrate substantially increases the reliability under mechanical stress (cyclic uniaxial stretching) of the stretchable interconnect and the transition areas between rigid components and stretchable interconnects are the zones which are most sensitive to failure under mechanical stress. Careful design and technology implementation is necessary, providing a gradual transition from rigid to flexible to stretchable parts of the circuit.

Technologies for stretchable circuits, with the same level of similarity to standard PCB manufacturing and assembly, and thus with the same high potential for transfer to an industrial environment and for mass production, have not been shown before.

This article comprises Chapter 6 from the recently published book ‘An Engineer’s Guide to Flexible Circuit Technology by J. Fjelstad

Components A distinction can be made between components with wire terminations (see Figure 28) and so‐called leadless components (see Figure 29). In between are the components with short terminations.

The paper is a report on a newly developed material and on technological studies which open up new methods for the combined application of laser and computer technology for advanced industrial applications, e.g., for the laser direct imaging of conducting paths, circuit structures in printed circuit boards and probably also in moulded interconnection devices. The process uses — instead of copper and photoresists — layers of a special polymer poly(bis‐alkylthio‐acetylene), PATAC, in which leads or conducting organic structures will be written by laser‐induced local conversion of PATAC into conductive polymer tracks. The organic leads obtained can be reinforced by electroplating if necessary. It is a purely additive process, which works without etching, thus avoiding environmental problems. The new material and technology also allow the direct imaging of resistors, capacitors and inductors on to printed circuit boards and make it possible to make chips and other electronic components conductive. It enables the production of leads in the 10 μm scale and for this reason is suitable for hybrid technology. The new technology is not restricted to one plane and can, therefore, also be used for 3‐D boards or MIDs.

For reliable telecommunication systems, Bellcore recommends that Surface Insulation Resistance (SIR) be monitored at key points in printed wiring board and circuit pack manufacturing. The Bellcore SIR criteria are based on the old ‘Bell System’ test pattern having 0·025 inch conductor line widths, and 0·050 inch conductor spacings. Since divestiture, many equipment suppliers have suggested using different test patterns, or even conductors on actual product for SIR testing. Also, with the trend to high density packaging and smaller conductor spacings, the Bellcore pattern now represents old technology. This work confirms and advances prior work suggesting pattern translation based on the SIR per square concept. Essentially exact SIR per square correlation has been found over an order of magnitude of pattern conductor space widths. Critical experimental techniques to modify the FR‐4 epoxy surface appropriately and an important theoretical hypothesis involving shadowing (proven experimentally) are developed in this work.

Establishes a quantitative evaluation method on solder bridging in microsoldering using a printed wiring board with comb pattern conductors. Bridge tests were conducted by immersing the comb pattern board into a molten solder bath. The total length of solder bridge between conductors against the total length between conductors was measured as a measure of the occurrence of solder bridging. The occurrence of bridging depended on the number of immersions, flux activity including solid content, conductor spacing, solder bath temperature and solder composition. The increase in number of immersion enhanced bridging. The rosin flux without activators showed higher bridging than the activated flux. Sn‐37Pb solder showed lower bridging than Sn‐3.5Ag‐5Bi solder. Solder bridging was found to be closely correlated with wettability, therefore, the improvement of wettability could be effective to suppress solder bridging. The proposed method is believed to be suitable for the quantitative evaluation of solder bridging.

A laser ablation technique has been used to fabricate conductor patterns on a 96% alumina substrate to evolve passive fine‐line components and structures. This paper reports the method of fabricating better fine‐line passive components for hybrid microelectronics application. The effect of a laser beam on the conductor and 96% alumina (Al₂O₃) substrate was studied in detail. Three predominant structures — namely debris, ablation border and irradiated bottom layer — were seen on the patterns. A detailed study of the dendritic growth caused by electrochemical migration on conductor lines fabricated by conventional screen printing and by laser ablation techniques is also reported.