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The paper gives design guidelines for polymer thick‐film technology (PTF). After an introduction reviewing the main PTF properties, materials and processes, detailed PTF design rules are presented. They are conservative, to achieve high production yield. The design rules are based on the considerable experience in the companies of the authors and of the persons mentioned in the acknowledgements, as well as on information from the open literature and from materials suppliers. The design guidelines are intended primarily for designers, but they are also important for production personnel, to facilitate a close coupling between design and production, and thus provide optimum use of PTF and obtain high production yield.

The paper describes a newly developed economical method of fabricating multilayers by means of polymeric copper paste, chemical copper and dielectric paste. The parameters discussed include thermal shock, solder joint strength, electrical performance and environmental studies coupled with the fabrication processes involved in producing high volume PTH multilayer circuits. The materials outlined show the use of polymer copper conductors as the interconnection segment in conjunction with chemical plating and dielectric paste in producing hybrid PCBs with more than two layers of interconnection.

The environmental reliability of Series Q, a system of materials designed for advanced ‘HIC’ circuits, has been studied using three different migration‐resistance tests. —LMRT: a test which is used to assess the resistance to electrochemical migration of horizontally adjacent, closely spaced conductor tracks in a high‐temperature, high‐humidity environment with a voltage bias present (60°C, 90%RH, 48 VDC). —HHBT: a test which monitors the ability of a dielectric to resist electrochemical migration when vertically adjacent crossover conductor tracks are oppositely biased (85°C, 85%RH, 5 VDC). —HBT: a test which measures how well a dielectric can sustain its resistance to voltage breakdown over extended periods of time during continuous exposure to conditions of high temperature and voltage (150°C, 200 VDC). The results show that the QSil™ and QPIus™ systems, the two materials systems that comprise Series Q, demonstrate excellent performance in all three areas. Predictions of how well circuits made from these materials will survive in their operating ambient over the long term, e.g., twenty years, have been made.

The evolution of digital electronic systems to ever‐faster pulse rise times has placed increased demands on printed wiring board (PWB) materials. Signal loss associated with dielectric materials has driven development and commercialization of cost‐effective low loss laminate materials. In order to provide a better understanding of conductor material and surface finish choices, efforts have been made to quantify the impacts of these factors on loss. An alternative test approach has been identified which provides a measure of conductor performance, decoupled from both system geometry and the influence of laminate material.

The purpose of this paper is to illustrate the dependence of flexible-electronics properties on the metal conductor parameters, such as the width, thickness, connection length and inner meander radius of the conductor.

This paper uses the finite element method to simulate flexible electronics with a copper conductor attached to polyimide substrate under tension, by using different parameters of the conductor.

By careful variation of copper conductor parameters, the authors obtain an optimized structure that can undergo large deformations with small stress concentrations, lending convenience for packaging.

The authors have developed an optimization method for selecting metal conductor parameters in flexible electronics.

The purpose of this paper is to provide an analytical solution to the plane eddy current problem inside conductive bars with rectangular cross‐section.

Eddy currents inside conductive materials have been investigated for a very long time, using measurements and mathematical modelling. This paper provides an analytical solution to the plane eddy current problem inside conductive bars with rectangular cross‐section.

The paper's approach solves the given plane eddy current problem with the boundary integral equation method. The Helmholtz' equation for vector potential inside the rectangle is solved by separation. The solution is inserted into the remaining boundary integral equation for the exterior vector potential in the domain surrounding the conductor yielding a system of linear equations. Results match existing solutions.

The method discussed provides a new way to solve the EC problem and is slightly faster than the available commercial codes; yet, it is limited to rectangular bars of cross‐section.

The paper describes the results obtained by the integration of Polymer Thick Film and Printed Circuit Technologies. Polymer Thick Film (PTF) Technology, applied to PCB manufacturing, helps the designer's task considerably and offers an interesting way to achieve time and cost reduction. The use of conductive and dielectric materials to generate cross‐overs and low interconnection density multilayers on epoxy‐glass substrates is shown and basic design rules are discussed. The performances of PTF conductive materials from two different suppliers are investigated in terms of conductivity, current carrying capacity and contact resistance with the copper‐clad layer. Surface and bulk insulation resistance, capacitance, loss factor and breakdown voltage are studied for dielectric materials from two different suppliers. The effects of environmental tests, i.e., thermal shocks, high temperature storage and temperature‐humidity‐bias test, on the performances of dielectric and conductive PTF are investigated by means of suitable test patterns. Application examples of Transmission System boards are discussed in terms of design and manufacturing times and costs.

IN consequence of the rapid progress in aircraft development in the past decade it has been necessary for cable manufacturers to provide an ever‐widening variety of cables to meet the special needs of aircraft designers.

Under certain environmental conditions, printed wiring boards (PWBs) respond to applied voltages by developing sub‐surface deposits of copper salts extending from anode to cathode along separated fibre/epoxy interfaces. These deposits are termed conductive anodic filaments (CAFs) and, in this work, the dimensions and growth patterns of a CAF have been determined by serial sectioning. The CAF growth pathway is characterised and the spatial distribution of the copper salts is quantified with scanning electron microscopy (SEM) using backscattered electrons. The chemical composition of the CAF is determined using energy dispersive X‐ray analysis (EDS). Prior research using high‐resolution non‐destructive X‐ray microtomography is correlated with the serial sectioning data. The failure phenomenon known as CAF may pose serious long‐term reliability concerns in electronics applications exposed to adverse and hostile environments.

To solve the problems associated with heat generation as packaging density increases, especially with the use of VSLI devices, high density metal core PCBs have been developed. The manufacturing process is evaluated alongside that of conventional G‐10 boards, as are the electrical properties of the two types. Characteristic impedance and propagation delay figures are compared; back crosstalk and heat dissipation capability are investigated, the incorporation of the metal core being found to produce a considerable improvement in terms of heat conductivity.