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High packaging density in the present VLSI era builds an acute power crisis, which limits the use of MOSFET device as a constituent block in CMOS technology. This leads researchers in looking for alternative devices, which can replace the MOSFET in CMOS VLSI logic design. In a quest for alternative devices, tunnel field effect transistor emerged as a potential alternative in recent times. The purpose of this study is to enhance the performances of the proposed device structure and make it compatible with circuit implementation. Finally, the performances of that circuit are compared with CMOS circuit and a comparative study is made to find the superiority of the proposed circuit with respect to conventional CMOS circuit.

Silicon–germanium heterostructure is currently one of the most promising architectures for semiconductor devices such as tunnel field effect transistor. Analytical modeling is computed and programmed with MATLAB software. Two-dimensional device simulation is performed by using Silvaco TCAD (ATLAS). The modeled results are validated through the ATLAS simulation data. Therefore, an inverter circuit is implemented with the proposed device. The circuit is simulated with the Tanner EDA tool to evaluate its performances.

The proposed optimized device geometry delivers exceptionally low OFF current (order of 10^−18 A/um), fairly high ON current (5x10^−5 A/um) and a steep subthreshold slope (20 mV/decade) followed by excellent ON–OFF current ratio (order of 10^13) compared to the similar kind of heterostructures. With a very low threshold voltage, even lesser than 0.1 V, the proposed device emerged as a good replacement of MOSFET in CMOS-like digital circuits. Hence, the device is implemented to construct a resistive inverter to study the circuit performances. The resistive inverter circuit is compared with a resistive CMOS inverter circuit. Both the circuit performances are analyzed and compared in terms of power dissipation, propagation delay and power-delay product. The outcomes of the experiments prove that the performance matrices of heterojunction Tunnel FET (HTFET)-based inverter are way ahead of that of CMOS-based inverter.

Germanium–silicon HTFET with stack gate oxide is analytically modeled and optimized in terms of performance matrices. The device performances are appreciable in comparison with the device structures published in contemporary literature. CMOS-like resistive inverter circuit, implemented with this proposed device, performs well and outruns the circuit performances of the conventional CMOS circuit at 45-nm technological node.

This study aims to regarding the application of traditional pulse frequency modulation control full-bridge LLC resonant converters in wide output voltage fields such as on-board chargers, there are issues with wide frequency adjustment ranges and low conversion efficiency.

To address these issues, this paper proposes a fixed-frequency pulse width modulation (PWM) control strategy for a full-bridge LLC resonant converter, which adjusts the gain by adjusting the duty cycle of the switches. In the full-bridge LLC converter, the two switches of the lower bridge arm are controlled by a fixed-frequency and fixed duty cycle, with their switching frequency equal to the resonant frequency, whereas the two switches of the upper bridge arm are controlled by a fixed-frequency PWM to adjust the output voltage. The operation modes of the converter are analyzed in detail, and a mathematical model of the converter is established. The gain characteristics of the converter under the fixed-frequency PWM control strategy are deeply analyzed, and the conditions for implementing zero-voltage switching (ZVS) soft switching in the converter are also analyzed in detail. The use of fixed-frequency PWM control simplifies the design of resonant parameters, and the fixed-frequency control is conducive to the design of magnetic components.

According to the fixed-frequency PWM control strategy proposed in this paper, the correctness of the control strategy is verified through simulation and the development and testing of a 500-W experimental prototype. Test results show that the primary side switches of the converter achieve ZVS and the secondary side rectifier diodes achieve zero-current switching, effectively reducing the switching losses of the converter. In addition, the control strategy reduces the reactive circulating current of the converter, and the peak efficiency of the experimental prototype can reach 95.2%.

The feasibility of the fixed-frequency PWM control strategy was verified through experiments, which has significant implications for improving the efficiency of the converter and simplifying the design of resonant parameters and magnetic components in wide output voltage fields such as on-board chargers.

The primary aim of this paper is to present a novel design approach for a ring voltage-controlled oscillator (VCO) suitable for L-band applications, whose oscillation frequency is less sensitive to power supply variations. In a few decades, with the advancement of modern wireless communication equipment, there has been an increasing demand for low-power and robust communication systems for longer battery life. A sudden drop in power significantly affects the performance of the VCO. Supply insensitive circuit design is the backbone of uninterrupted VCO performance. Because of their important roles in a variety of applications, VCOs and phase locked loops (PLLs) have been the subject of significant research for decades. For a few decades, the VCO has been one of the major components used to provide a local frequency signal to the PLL.

First, this paper chose to present recent developments on implemented techniques of ring VCO design for various applications. A complementary metal oxide semiconductor (CMOS)-based supply compensation technique is presented, which aims to reduce the change in oscillation frequency with the supply. The proposed circuit is designed and simulated on Cadence Virtuoso in 0.18 µm CMOS process under 1.8 V power supply. Active differential configuration with a cross-coupled NMOS structure is designed, which eliminates losses and negates supply noise. The proposed VCO is designed for excellent performance in many areas, including the L-band microwave frequency range, supply sensitivity, occupied area, power consumption and phase noise.

This work provides the complete design aspect of a novel ring VCO design for the L-band frequency range, low phase noise, low occupied area and low power applications. The maximum value of the supply sensitivity for the proposed ring VCO is 1.31, which is achieved by changing the VDD by ±0.5%. A tuning frequency range of 1.47–1.81 GHz is achieved, which falls within the L-band frequency range. This frequency range is achieved by varying the control voltage from 0.0 to 0.8 V, which shows that the proposed ring VCO is also suitable for low voltage regions. The total power consumed by the proposed ring VCO is 14.70 mW, a remarkably low value using this large transistor count. The achievable value of phase noise is −88.76 dBc/Hz @ 1 MHz offset frequency, which is a relatively small value. The performance of the proposed ring VCO is also evaluated by the figure of merit, achieving −163.13 dBc/Hz, which assures the specificity of the proposed design. The process and temperature variation simulations also validate the proposed design. The proposed oscillator occupied an extremely small area of only 0.00019 mm² compared to contemporary designs.

The proposed CMOS-based supply compensation method is a unique design with the size and other parameters of the components used. All the data and results obtained show its originality in comparison with other designs. The obtained results are preserved to the fullest extent.

High throughput and power efficient computing devices are highly essential in many autonomous system-based applications. Since the computational power keeps on increasing in recent years, it is necessary to develop energy efficient static RAM (SRAM) memories with high speed. Nowadays, Static Random-Access Memory cells are predominantly liable to soft errors due to the serious charge which is crucial to trouble a cell because of fewer noise margins, short supply voltages and lesser node capacitances.

Power efficient SRAM design is a major task for improving computing abilities of autonomous systems. In this research, instability is considered as a major issue present in the design of SRAM. Therefore, to eliminate soft errors and balance leakage instability problems, a signal noise margin (SNM) through the level shifter circuit is proposed.

Bias Temperature Instabilities (BTI) are considered as the primary technology for recently combined devices to reduce degradation. The proposed level shifter-based 6T SRAM achieves better results in terms of delay, power and SNM when compared with existing 6T devices and this 6T SRAM-BTI with 7 nm technology is also applicable for low power portable healthcare applications. In biomedical applications, Body Area Networks (BANs) require the power-efficient SRAM design to extend the battery life of BAN sensor nodes.

The proposed method focuses on high speed and power efficient SRAM design for smart ubiquitous sensors. The effect of BTI is almost eliminated in the proposed design.

This study aims to offer a hybrid stand-alone system for electric vehicle (EV) charging stations (CS), an emerging power scheme due to the availability of renewable and environment-friendly energy sources. This paper presents the analysis of a photovoltaic (PV) with an adaptive neuro-fuzzy inference system (ANFIS) algorithm, solid oxide fuel cell (SOFC) and a battery storage scheme incorporated for EV CS in a stand-alone mode. In previous studies, either the hydrogen fuel of SOFC or the irradiance is controlled using artificial neural network. These parameters are not controlled simultaneously using an ANFIS-based approach. The ANFIS-based stand-alone hybrid system controlling both the fuel flow of SOFC and the irradiance of PV is discussed in this paper.

The ANFIS algorithm provides an efficient estimation of maximum power (MP) to the nonlinear voltage–current characteristics of a PV, integrated with a direct current–direct current (DC–DC) converter to boost output voltage up to 400 V. The issue of fuel starvation in SOFC due to load transients is also mitigated using an ANFIS-based fuel flow regulator, which robustly provides fuel, i.e. hydrogen per necessity. Furthermore, to ensure uninterrupted power to the CS, PV is integrated with a SOFC array, and a battery storage bank is used as a backup in the current scenario. A power management system efficiently shares power among the aforesaid sources.

A comprehensive simulation test bed for a stand-alone power system (PV cells and SOFC) is developed in MATLAB/Simulink. The adaptability and robustness of the proposed control paradigm are investigated through simulation results in a stand-alone hybrid power system test bed.

The simulation results confirm the effectiveness of the ANFIS algorithm in a stand-alone hybrid power system scheme.

Induction heating processes need to adapt to complex geometries or variable processes that require a high degree of flexibility in the induction heating setup. This is usually done using complex inductors or adaptable resonant tanks, which leads to costly and constrained implementations. This paper aims to propose a multi-level, versatile power supply able to adapt the output to the required induction heating process.

This paper proposes a versatile multilevel topology able to generate versatile output waveforms. The methodology followed includes simulation of the proposed architecture, design of the power electronics, control and magnetic elements and laboratory tests after building a 10-level prototype.

The proposed converter has been designed and tested using an experimental prototype. The designed generator is able to operate at 1 kVpp and 100 A at 250 kHz, proving the feasibility of the proposed approach.

The proposed converter enables versatile waveform generation, enabling advanced tests and processes on induction heating system. The proposed system allows for multifrequency generation using a single inductor and converter, or advanced tests for inductive and capacitive components used on induction heating systems. Unlike previous multifrequency proposals, the proposed generator enables a significantly improved versatility in terms of operational frequency and amplitude in a single converter.

Plasma technology has become of great interest in a wide variety of industrial and domestic applications. Moreover, the application of plasma in the domestic field has increased in recent years due to its applications to surface treatment and disinfection. In this context, there is a significant need for versatile power generators able to generate a wide range of output voltage/current ranging from direct current (DC) to tens of kHz in the range of kVs. The purpose of this paper is to develop a highly versatile power converter for plasma generation based on a multilevel topology.

This paper proposes a versatile multilevel topology able to generate versatile output waveforms. The followed methodology includes simulation of the proposed architecture, design of the power electronics, control and magnetic elements and test laboratory tests after building an eight-level prototype.

The proposed converter has been designed and tested using an experimental prototype. The designed generator is able to operate at 10 kVpp output voltage and 10 kHz, proving the feasibility of the proposed approach.

The proposed converter enables versatile waveform generation, enabling advanced studies in plasma generation. Unlike previous proposals, the proposed converter features bidirectional operation, allowing to test complex reactive loads. Besides, complex waveforms can be generated, allowing testing complex patterns for optimized cold-plasma generation methods. Besides, unlike transformer- or resonant-network-based approaches, the proposed generator features very low output impedance regardless the operating point, exhibiting improved and reliable performance for different operating conditions.