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Utilizing electrical discharge machining (EDM) to process micro-holes in superalloys may lead to the formation of remelting layers and micro-cracks on the machined surface. This work proposes a method of composite processing of EDM and ultrasonic vibration drilling for machining precision micro-holes in complex positions of superalloys.

A six-axis computer numerical control (CNC) machine tool was developed, whose software control system adopted a real-time control architecture that integrates electrical discharge and ultrasonic vibration drilling. Among them, the CNC system software was developed based on Windows + RTX architecture, which could process the real-time processing state received by the hardware terminal and adjust the processing state. Based on the SoC (System on Chip) technology, an architecture for a pulse generator was developed. The circuit of the pulse generator was designed and implemented. Additionally, a composite mechanical system was engineered for both drilling and EDM. Two sets of control boards were designed for the hardware terminal. One set was the EDM discharge control board, which detected the discharge state and provided the pulse waveform for turning on the transistor. The other was a relay control card based on STM32, which could meet the switch between EDM and ultrasonic vibration, and used the Modbus protocol to communicate with the machining control software.

The mechanical structure of the designed composite machine tool can effectively avoid interference between the EDM spindle and the drilling spindle. The removal rate of the remelting layer on 1.5 mm single crystal superalloys after composite processing can reach over 90%. The average processing time per millimeter was 55 s, and the measured inner surface roughness of the hole was less than 1.6 µm, which realized the  micro-hole machining without remelting layer, heat affected zone and micro-cracks in the single crystal superalloy.

The test results proved that the key techniques developed in this paper were suite for micro-hole machining of special materials.

Adoption of integrated MOS based pseudo-resistor (PR) structures instead of using off-chip passive poly resistors for analog circuits in complementary metal oxide semiconductor technology (CMOS) is an area-efficient way for realizing larger time constants. However, issue of common-mode voltage shifting and excess dependency on the process and temperature variations introduce nonlinearity in such structures. So there is dire need to not only closely look for the origin of the problem with the help of a thorough mathematical analysis but also suggest the most suitable PR structure for the purpose catering broadly to biomedical analog circuit applications.

In this work, incremental resistance (IR) expressions and IR range for balanced PR (BPR) structures operating in the subthreshold region have been closely analyzed for broader range of process-voltage-temperature variations. All the post-layout simulations have been obtained using BSIM3V3 device models in 0.18 µm standard CMOS process.

The obtained results show that the pertinent problem of common-mode voltage shifting in such PR structures is completely resolved in scaled gate linearization and bulk-driven quasi-floating gate (BDQFG) BPR structures. Among all BPR structures, BDQFG BPR remarkably shows constant IR value of 1 TΩ over −1 V to 1 V voltage swing for wider process and temperature variations.

Various balanced PR design techniques reported in this work will help the research community in implementing larger time constants for analog-mixed signal circuits.

The PR design techniques presented in the present piece of work is expected to be used in developing tunable and accurate biomedical prosthetics.

The BPR structures thoroughly analyzed and reported in this work may be useful in the design of analog circuits specifically for applications such as neural signal recording, cardiac electrical impedance tomography and other low-frequency biomedical applications.