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This study aims to investigate the reliability issues of microvoid cracks in solder joint packages exposed to thermal cycling fatigue.

The specimens are subjected to JEDEC preconditioning level 1 (85 °C/85%RH/168 h) with five times reflow at 270°C. This is followed by thermal cycling from 0°C to 100°C, per IPC-7351B standards. The specimens' cross-sections are inspected for crack growth and propagation under backscattered scanning electronic microscopy. The decoupled thermomechanical simulation technique is applied to investigate the thermal fatigue behavior. The impacts of crack length on the stress and fatigue behavior of the package are investigated.

Cracks are initiated from the ball grid array corner of the solder joint, propagating through the transverse section of the solder ball. The crack growth increases continuously up to 0.25-mm crack length, then slows down afterward. The J-integral and stress intensity factor (SIF) values at the crack tip decrease with increased crack length. Before 0.15-mm crack length, J-integral and SIF reduce slightly with crack length and are comparatively higher, resulting in a rapid increase in crack mouth opening displacement (CMOD). Beyond 0.25-mm crack length, the values significantly decline, that there is not much possibility of crack growth, resulting in a negligible change in CMOD value. This explains the crack growth arrest obtained after 0.25-mm crack length.

This work's contribution is expected to reduce the additional manufacturing cost and lead time incurred in investigating reliability issues in solder joints.

The work investigates crack propagation mechanisms of microvoid cracks in solder joints exposed to moisture and thermal fatigue, which is still limited in the literature. The parametric variation of the crack length on stress and fatigue characteristics of solder joints, which has never been conducted, is also studied.

To solve the problems caused by using precise molds for copper column positioning in the current column grid array package, this paper aims to optimize the proposed friction plunge micro-welding (FPMW) technology without mold assistance, to overcome the problems of low interfacial bonding strength, shrinkage cavities and flash defects caused by the low hold-tight force of solder on the copper column.

A pressurizing device installed under the drill chuck of the friction welding machine is designed, which is used to apply a static constraint to the solder ball obliquely downward to increase the hold-tight force of the peripheral solder on the copper column during welding and promote the friction metallurgical connection between them.

The results show that the application of static constraint during welding can increase the compactness of the solder near the friction interface and effectively inhibit occurrences of flash, shrinkage cavities and crystal defects such as vacancies. Therefore, compared with the unconstrained (UC) FPMW, the average strength of the statically constrained (SC) FPMW joints and aged SC-FPMW joints can be increased by 51.1% and 122.6%, and the problem of the excessive growth of the interfacial connection layer in the UC-FPMW joints during aging can be effectively avoided.

The application of static constraint effectively inhibits the occurrence of defects such as shrinkage cavities, vacancies and flash in FPMW joints, and the welding quality is significantly improved.

This study aims to investigate the thermal fracture mechanism of moisture-preconditioned SAC305 ball grid array (BGA) solder joints subjected to multiple reflow and thermal cycling.

The BGA package samples are subjected to JEDEC Level 1 accelerated moisture treatment (85 °C/85%RH/168 h) with five times reflow at 270 °C. This is followed by multiple thermal cycling from 0 °C to 100 °C for 40 min per cycle, per IPC-7351B standards. For fracture investigation, the cross-sections of the samples are examined and analysed using the dye-and-pry technique and backscattered scanning electron microscopy. The packages' microstructures are characterized using an energy-dispersive X-ray spectroscopy approach. Also, the package assembly is investigated using the Darveaux numerical simulation method.

The study found that critical strain density is exhibited at the component pad/solder interface of the solder joint located at the most distant point from the axes of symmetry of the package assembly. The fracture mechanism is a crack fracture formed at the solder's exterior edges and grows across the joint's transverse section. It was established that Au content in the formed intermetallic compound greatly impacts fracture growth in the solder joint interface, with a composition above 5 Wt.% Au regarded as an unsafe level for reliability. The elongation of the crack is aided by the brittle nature of the Au-Sn interface through which the crack propagates. It is inferred that refining the solder matrix elemental compound can strengthen and improve the reliability of solder joints.

Inspection lead time and additional manufacturing expenses spent on investigating reliability issues in BGA solder joints can be reduced using the study's findings on understanding the solder joint fracture mechanism.

Limited studies exist on the thermal fracture mechanism of moisture-preconditioned BGA solder joints exposed to both multiple reflow and thermal cycling. This study applied both numerical and experimental techniques to examine the reliability issue.

This paper aims to compare and evaluate the influence of package designs and characteristics on the mechanical reliability of electronic assemblies when subjected to harmonic vibrations.

Using finite element analysis (FEA), the effect of package design-related parameters, including the interconnect array configuration, i.e. full vs perimeter, and package size, on solder mechanical stresses are fully addressed.

The results of FEA simulations revealed that the number of solder rows or columns available in the array, could significantly affect solder stresses. In addition, smaller packages result in lower solder stresses and differing distributions.

In literature, there are no papers that discuss the effect of solder array layout on electronic packages vibration reliability. In addition, general rules for designing electronic assemblies subjected to harmonic vibration loadings are proposed in this paper.

The purpose of this paper is to illustrate the new technical demands and reliability challenges to printed circuit board (PCB) designs, materials and processes when the transmission frequency increases from Sub-6 GHz in previous generations to millimeter (mm) wave in fifth-generation (5G) communication technology.

The approach involves theoretical analysis and actual case study by various characterization techniques, such as a stereo microscope, metallographic microscope, scanning electron microscope, energy dispersive spectroscopy, focused ion beam, high-frequency structure simulator, stripline resonator and mechanical test.

To meet PCB signal integrity demands in mm-wave frequency bands, the improving proposals on copper profile, resin system, reinforcement fabric, filler, electromagnetic interference-reducing design, transmission line as well as via layout, surface treatment, drilling, desmear, laminating and electroplating were discussed. And the failure causes and effects of typical reliability issues, including complex permittivity fluctuation at different frequencies or environments, weakening of peel strength, conductive anodic filament, crack on microvias, the effect of solder joint void on signal transmission performance and soldering anomalies at ball grid array location on high-speed PCBs, were demonstrated.

The PCB reliability problem is the leading factor to cause failures of PCB assemblies concluded from statistical results on the failure cases sent to our laboratory. The PCB reliability level is very essential to guarantee the reliability of the entire equipment. In this paper, the summarized technical demands and reliability issues that are rarely reported in existing articles were discussed systematically with new perspectives, which will be very critical to identify potential reliability risks for PCB in 5G mm-wave applications and implement targeted improvements.

Due to the miniaturization of electronic devices, the increased current density through solder joints leads to the occurrence of electromigration failure, thereby reducing the reliability of electronic devices. The purpose of this study is to propose a finite element-artificial neural network method for the prediction of temperature and current density of solder joints, and thus provide reference information for the reliability evaluation of solder joints.

The temperature distribution and current density distribution of the interconnect structure of electronic devices were investigated through finite element simulations. During the experimental process, the actual temperature of the solder joints was measured and was used to optimize the finite element model. A large amount of simulation data was obtained to analyze the neural network by varying the height of solder joints, the diameter of solder pads and the magnitude of current loads. The constructed neural network was trained, tested and optimized using this data.

Based on the finite element simulation results, the current is more concentrated in the corners of the solder joints, generating a significant amount of Joule heating, which leads to localized temperature rise. The constructed neural network is trained, tested and optimized using the simulation results. The ANN 1, used for predicting solder joint temperature, achieves a prediction accuracy of 96.9%, while the ANN 2, used for predicting solder joint current density, achieves a prediction accuracy of 93.4%.

The proposed method can effectively improve the estimation efficiency of temperature and current density in the packaging structure. This method prevails in the field of packaging, and other factors that affect the thermal, mechanical and electrical properties of the packaging structure can be introduced into the model.

This study aims to focus on the surface mount technology (SMT) mass production process of Sn-9Zn-2.5Bi-1.5In solder. It explores it with some components that will provide theoretical support for the industrial SMT application of Sn-Zn solder.

This study evaluates the properties of solder pastes and selects a more appropriate reflow parameter by comparing the microstructure of solder joints with different reflow soldering profile parameters. The aim is to provide an economical and reliable process for SMT production in the industry.

Solder paste wettability and solder ball testing in a nitrogen environment with an oxygen content of 3,000 ppm meet the requirements of industrial production. The printing performance of the solder paste is good and can achieve a printing rate of 100–160 mm/s. When soldering with a traditional stepped reflow soldering profile, air bubbles are generated on the surface of the solder joint, and there are many voids and defects in the solder joint. A linear reflow soldering profile reduces the residence time below the melting point of the solder paste (approximately 110 s). This reduces the time the zinc is oxidized, reducing solder joint defects. The joint strength of tin-zinc joints soldered with the optimized reflow parameters is close to that of Sn-58Bi and SAC305, with high joint strength.

This study attempts to industrialize the application of Sn-Zn solder and solves the problem that Sn-Zn solder paste is prone to be oxidized in the application and obtains the SMT process parameters suitable for Sn-9Zn-2.5Bi-1.5In solder.

This paper aims to discuss the ethical aspects of hardware reverse engineering (HRE) and propose an ethical framework for HRE when used to mitigate cyber risks of the digital supply chain of critical infrastructure operators.

A thorough review and analysis of existing relevant literature was performed to establish the current state of knowledge in the field. Ethical frameworks proposed for other areas/disciplines and identified pertinent ethical principles have been used to inform the proposed framework’s development.

The proposed framework provides actionable guidance to security professionals engaged with such activities to support them in assessing whether an HRE project conforms to ethical principles. Recommendations on action needed to complement the framework are also proposed. According to the proposed framework, reverse engineering is neither unethical nor illegal if performed honourably. Collaboration with vendors and suppliers at an industry-wide level is critical for appropriately endorsing the proposed framework.

To the best of the authors’ knowledge, no ethical framework currently guides cybersecurity research, far less of cybersecurity vulnerability research and reverse engineering.

This study aims to investigate the possible defects and their root causes in a soft-termination multilayered ceramic capacitor (MLCC) when subjected to a thermal reflow process.

Specimens of the capacitor assembly were subjected to JEDEC level 1 preconditioning (85 °C/85%RH/168 h) with 5× reflow at 270°C peak temperature. Then, they were inspected using a 2 µm scanning electron microscope to investigate the evidence of defects. The reliability test was also numerically simulated and analyzed using the extended finite element method implemented in ABAQUS.

Excellent agreements were observed between the SEM inspections and the simulation results. The findings showed evidence of discontinuities along the Cu and the Cu-epoxy layers and interfacial delamination crack at the Cu/Cu-epoxy interface. The possible root causes are thermal mismatch between the Cu and Cu-epoxy layers, moisture contamination and weak Cu/Cu-epoxy interface. The maximum crack length observed in the experimentally reflowed capacitor was measured as 75 µm, a 2.59% difference compared to the numerical prediction of 77.2 µm.

This work's contribution is expected to reduce the additional manufacturing cost and lead time in investigating reliability issues in MLCCs.

Despite the significant number of works on the reliability assessment of surface mount capacitors, work on crack growth in soft-termination MLCC is limited. Also, the combined experimental and numerical investigation of reflow-induced reliability issues in soft-termination MLCC is limited. These cited gaps are the novelties of this study.

The purpose of the present work is to study the impacts of rapid cooling and Tb rare-earth additions on the structural, thermal and mechanical behavior of Bi–0.5Ag lead-free solder for high-temperature applications.

Effect of rapid solidification processing on structural, thermal and mechanical properties of Bi-Ag lead-free solder reinforced Tb rare-earth element.

The obtained results indicated that the microstructure consists of rhombohedral Bi-rich phase and Ag99.5Bi0.5 intermetallic compound (IMC). The addition of Tb could effectively reduce the onset and melting point. The elastic modulus of Tb-containing solders was enhanced to about 90% at 0.5 Tb. The higher elastic modulus may be attributed to solid solution strengthening effect, solubility extension, microstructure refinement and precipitation hardening of uniform distribution Ag99.5Bi0.5 IMC particles which can reasonably modify the microstructure, as well as inhibit the segregation and hinder the motion of dislocations.

It is recommended that the lead-free Bi-0.5Ag-0.5Tb solder be a candidate instead of common solder alloy (Sn-37Pb) for high temperature and high performance applications.