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This paper aims to describe and document the application of commonly utilized solder joint failure analysis techniques to lead‐free solder joints.

Traditional failure analysis techniques, including visual inspection, X‐ray radiography, mechanical strength testing, dye and pry, metallography, microscopy and photomicrography, are reviewed. These techniques are demonstrated as applied to lead‐free and tin lead solder joints. Common failure modes observed in lead‐free and tin lead solder joints are described and compared.

It is shown that the traditional failure analysis techniques previously utilized for tin lead solder joints are widely applicable to the analysis of lead‐free solder joints. The changes required to effectively apply these techniques to the analysis of lead‐free solder joints are described.

This paper will be instrumental to the process, quality, reliability and failure analysis engineering disciplines in furthering understanding of the application of failure analysis techniques of both tin lead and lead‐free solder joints.

The purpose of this paper is to evaluate selected methods of reduction voidings in lead-free solder joints underneath thermal pads of light-emitting diodes (LEDs), using X-ray inspection and Six Sigma methodology.

On the basis of cause and effect diagram for solder voiding, the potential causes of voids and influence of process variables on void formation were found. Three process variables were chosen: the type of reflow soldering, vacuum incorporation and the type of solder paste. Samples of LEDs were mounted with convection and vapour phase reflow soldering. Vacuum was incorporated into vapour phase soldering. Two types of solder pastes OM338PT and LFS-216LT were used. Algorithm incorporated into X-ray inspection system enabled to calculate the statistical distribution of LED thermal pad coverage and to find the process capability index (C_pk) of applied soldering techniques.

The evaluation of selected soldering processes of LEDs in respect of their thermal pad coverage and statistical C_pk indices is presented. Vapour-phase soldering with vacuum is capable (C_pk > 1) for OM338PT and LFS-216LT paste. Convection reflow without vacuum with LFS-216LT paste is also capable (C_pk = 1.1). Other technological soldering processes require improvements. Vacuum improves radically the capability of a reflow soldering for an LED assembly. When vacuum is not accessible, some improvement of capability to a lower extent is possible by an application of void-free solder pastes.

Six Sigma statistical methodology combined with X-ray diagnosis was used to check whether applied methods of void reduction underneath LED thermal pads are capable processes.

After a brief introduction to the advantages and method of construction of flip chip solder bond devices, this paper looks at different techniques that can be used to inspect these devices at various stages in their construction. These techniques include optical, infra‐red, acoustic and electron microscopy, radiograph, electrical and tensile testing. The advantages and limitations of each of the techniques are discussed and an outline inspection schedule is suggested.

The purpose of this paper is to develop a novel automatic and accurate measurement technique for the volume of solder which is present in solder paste in pin‐in‐paste (PIP) technology and a calculation algorithm for predicting solder joint quality.

A new method is described for accurately determining the volume of solder alloy in solder paste that is present in and around the through hole, using X‐ray measurements (orthogonal view X‐ray images, instead of angle view), image processing and other calculations. In addition, various calibration tool constructions are investigated and a method is suggested for determining the calibration curve (for each solder paste) of an X‐ray machine.

A new calibration tool has been developed to accurately measure the calibration curve of X‐ray machines. Based on several tests, a fast and reliable image processing method for measuring the average grey scale of each pasted through hole is described. Numerous PIP solder joints have been created then analysed using the methodology. To verify the efficiency of the described methods, joints are soldered and inspected using cross‐sectioning and X‐ray imaging.

Calibration curve measurement of an X‐ray machine is done with the help of the developed tool for PIP technology. Orthogonal view X‐ray images are used to measure the volume of printed solder alloy (paste). During the image processing, circle fitting has been simplified to line fitting.

A ball grid array (BGA) is a surface‐mount device and is processed in a standard surface‐mount (SM) assembly line. However, there are some special features which make it different from other assemblies. The peculiarities of PCB layout, screen printing, placement, soldering, and inspection in BGA processing are presented. The failures of BGA assembly during ramp up and series production start‐up are analysed in detail. An assembly quality better than 1dpm was achieved. The scale of repair is determined by the electrical quality of the devices. If small packages with higher pincount and better electrical performance are required, the µBGA is a sound choice. Compared with other high pincount packages with a small formfactor as TAB, flip‐chip and chip on board, the µBGA may be processed in a standard SM assembly line. The results of µBGA‐assembly feasibility studies are discussed.

The purpose of this paper is to study the solder beading phenomenon (referring to larger-sized solder balls) of surface-mounted electrolytic capacitors. Solder beading could induce failures by violating the minimal electrical clearance on the printed circuit board (PCB). In modern lead-free reflow soldering, especially in high-reliability industries, such as automotive, aeroplane and aerospace, detecting and preventing such defects is essential in reliable and cost-effective manufacturing.

The large size of the involved components may block the view of automatic optical inspection; therefore, X-ray inspection is necessary. To detect the failure mode, X-ray imaging, cross-section grinding, optical microscopy and Fourier transformed infrared spectroscopy were used. High-resolution noncontact profilometry and optical microscopy were used to analyse component designs. The surface mounting process steps were also analysed to reveal their dependence on the issue. Test methods were designed and performed to reveal the behaviour of the solder paste (SP) during the reflow soldering process and to emphasise the component design relevance.

It was found that the reduction of SP volume only reduces the failure rate but does not solve the problem. Results show that excessive component placement pressure could induce solder beading. Statistical analysis revealed that differences between distinct components had the highest effect on the solder beading rate. Design aspects of solder beading-prone components were identified and discussed as the primary source of the problem.

The findings can be applied in surface-mount technology production, where the total failure count and resulting failure costs could be reduced according to the findings.

This paper shows that component design aspects such as the low distance between the underside of the component and the PCB and blocked proper outgassing of volatile compounds of the SP can be root causes of solder beading under surface-mounted electrolytic capacitors.