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Wiring requirements and thermomechanical factors related to the design and fabrication of Polymer‐on‐metal constraining core PWBs are discussed. The necessity of small plated‐through‐holes for high‐density surface mount design is shown. Typical MLB constructions are shown with techniques for increasing wiring density. A design methodology for the POM construction is defined. The thermomechanical properties of copper‐Invar‐copper and the interactions of the MLB are described. The reliability of small PTHs is measured over a wide range of module constructions. Sixteen mil. diameter PTHs are reliable if the MLB thickness is kept below 0·040 inch. Through‐substrate PTHs make reliable side‐to‐side interconnections.

In an electronic manufacturing environment, rework of pin‐in‐hole components on printed circuit boards is an essential process. Rework enhances product yield and through‐put efficiency by allowing device repair to occur quickly and at significantly reduced costs in comparison with complete board reconstruction. However, current rework techniques are not without their shortcomings, most notably enhanced dissolution of copper in plated‐through holes. This paper discusses a new methodology using polymer films as barrier layers, resulting in negligible plated‐through‐hole copper dissolution when conventional rework technologies are practised.

The aim of this study is to investigate the effects of offset angle in wave soldering by using thermal fluid structure interaction modeling with experimental validation.

The authors used a thermal coupling approach that adopted mesh-based parallel code coupling interface between finite volume-and finite element-based software (ABAQUS). A 3D single pin-through-hole (PTH) connector with five offset angles (0 to 20°) on a printed circuit board (PCB) was built and meshed by using computational fluid dynamics preprocessing software called GAMBIT. An implicit volume of fluid technique with a second-order upwind scheme was also applied to track the flow front of solder material (Sn63Pb37) when passing through the solder pot during wave soldering. The structural solver and ABAQUS analyzed the temperature distribution, displacement and von Mises stress of the PTH connector. The predicted results were validated by the experimental solder profile.

The simulation revealed that the PTH offset angle had a significant effect on the filling of molten solder through the PCB. The 0° angle yielded the best filling profile, filling time, lowest displacement and thermal stress. The simulation result was similar to the experimental result.

This study provides a better understanding of the process control in wave soldering for PCB assembly.

This study provides fundamental guidelines and references for the thermal coupling method to address reliability issues during wave soldering. It also enhances understanding of capillary flow and PTH joint issues to achieve high reliability in PCB assembly industries.

Thermal cycling tests and failure modelling were conducted on FR‐4 and cyanate ester printed circuit board (PCB) substrate materials to evaluate reliability limits tor solder and repair processes, particularly for high pin count, through‐ hole devices. The boards used were double‐sided, 0.125 in. thick with 0.029 in. diameter plated‐through holes (PTHs). Thermal cycling was accomplished using hot oil immersion at 240°C and 260°C followed by forced room‐temperature air. The average number of thermal cycles‐to‐failure was 10 for FR‐4, 20 for cyanate ester epoxy blend, and 50 for cyanate ester. Weibull statistics were used to predict failure rates for various pin count devices. Failure analysis was used to identify the mechanism of failure, and modelling was used to predict cycles‐to‐failure based on typical material properties. The primary failure mechanism was corner cracking in FR‐4 and a combination of corner cracking and barrel cracking in the cyanate ester materials. The modelling used a modified pad tilt geometry combined with Coffin‐Manson low cycle fatigue theory, which resulted in predictions of the same order as those for the cycling tests. Key material properties and process parameters were identified that controlled the failure response of the plated‐through hole and board substrate combinations.

To show how the use of conductor spacings below 4 mil in printed wiring boards (PWBs) can introduce an unanticipated failure mechanism, leading to current leakage and short circuit failure.

The tests in this study were conducted in accordance with IPC‐TM‐650 2.6.25, using boards designed with conductor spacings between plated through holes (PTHs) ranging from 6 to 3 mil and from 8 to 3 mil between PTHs and ground planes. The board types and conductor spacings were selected to include current and future printed circuit board fabrication technology.

For PWBs that may be used in harsh environments where the relative humidity and temperature may approach those of the test environments, even for relatively short periods of time, spacings of 4 mil or less in the materials tested may not be appropriate. However, it is unlikely that the 85°C and 85 percent RH conditions are the minimum conditions to induce this failure mechanism. More tests at lower temperatures and relative humidity combinations should be conducted to evaluate conditions at which this type of failure begins.

The value of the paper lies in that the tests show that the IPC industry standard for conductive filament formation (CFF) testing of PTH‐PTH conductor spacings of 4 mil or less, at 85°C/85 percent RH can introduce a CFF variant failure mechanism, and therefore, may need to be modified to ensure that the test conditions accelerate the CFF mechanism and not other low resistance paths.

The reliability of solder joints and plated‐through‐hole (PTH) copper structure was investigated for 503 I/O interstitial pin grid array packages with two different pin diameters. Each package type was wave soldered to printed wiring boards having two different surface finishes and PTH sizes, by using the 63Sn–37Pb alloy. Accelerated thermal cycling with continuous monitoring was used in conjunction with metallographic analysis to determine reliability and to elucidate the failure threshold. The microstructural features and failure modes were found to be similar among the solder joints despite the physical differences. The measured solder joint fatigue lifetimes varied from 2450 to 3700 thermal cycles, depending on pin and PTH combinations. The reliability of PTH copper exceeded 4000 thermal cycles regardless of the PTH size. The solder joint fatigue results were used to predict the reliability under operating conditions.

This paper describes the use of the EE‐1 process for making high‐reliability multilayer boards. The EE‐1 process eliminates the need for flash electroless copper for plated‐through holes. With this process, copper is directly electrodeposited onto an activated through‐hole. In addition to eliminating electroless deposition, the EE‐1 process claims to simplify process control, provide excellent copper‐to‐copper adhesion, and total backlight PTH coverage. Production experience with the process is extensive as it has been used at Photocircuits, Atlanta, since January 1986 in the fabrication of double‐sided boards. Test data of joint reliability and physical properties of copper in PTHs of multilayer boards obtained through this unique approach are presented. A special test, which directly measures the bond strength between through‐hole deposited copper and inner foil of multilayers, is also discussed.

This paper introduces a series of eight describing the research work undertaken into the most pervasive of quality assurance problems in the mass soldering of plated‐through‐hole (PTH) printed circuit boards, namely the occurrence of voids and blowholes in the solder fillets. The research programme has been carried out at NPL with advice and practical involvement of members of the Soldering Science and Technology Club whose contributions have played a large part in its successful outcome. The work has led to an understanding of the mechanisms giving rise to this problem and recommendations for production procedures to fully control it. In this first paper, results are presented of a UK‐wide survey of the electronics assembly industry and of the assessment made regarding the extent, the harmfulness and the cost of the problem of voids and blowholes.

Reviews stencil design requirements for printing solder paste around and in through‐hole pads/openings. There is much interest in this procedure since full implementation allows the placement of both through‐hole components as well as surface mount devices and the subsequent reflow of both simultaneously. This in turn eliminates the need to wave solder or hand solder through‐hole components. The effect of component material type, pin type, lead length, and standoff height of the through hole components is reviewed. Board design issues including plated through‐hole size, pad size, board thickness, and solder mask type are also reviewed. Three stencil designs are considered: single thickness stencils with oversized stencil apertures for overprinting solder paste in the through‐hole pad areas; step stencils with oversized stencil apertures for overprinting solder paste in the through‐hole pad areas; thick stencils (0.384‐0.635 mm thick) for printing solder paste in the through‐hole pad areas. The latter thick stencil is the second stencil in the two‐print stencil process. Several examples are reviewed with the recommended stencil designs.

This paper is the second of a series dealing with the blowholing problem on through‐hole plated printed circuit boards. In the previous paper the authors have considered the impact of the problem on the UK electronics assembly industry. Here they consider the nature of the gas causing blowholes and voids, its origin and the kinetics of its generation and evolution. When a printed circuit board with plated‐through‐holes is wave soldered, the thermal spike of the molten solder activates the evolution of gas, sometimes in relatively enormous quantities. The gas is seen bubbling from the surface of the molten solder in the joint. Upon freezing, the solder either traps the gas in a void enclosed within the fillet or, if the gas is escaping from the surface as freezing occurs, forms a blowhole.