Search results

Temperature measurements using thermocouples are made at several locations on J‐leaded plastic quad‐flat packs and printed wiring boards during the reflow soldering process. Both moisture saturated and dry packages are studied, with little difference found in the measured temperature on the package surfaces. The temperature at the component lead is found to be a good approximation to the temperatures observed near the die. This provides an externally measurable parameter to assess delamination and popcorning.

Non‐woven laminates have begun to gain recognition in the electronics industry because they are generally thinner and flatter than woven laminates. This study characterizes the mechanical and thermo‐mechanical properties of non‐woven, randomly dispersed, short fiber laminates, and identifies potential failure mechanisms which must be addressed in the design and utilization of printed circuit boards using non‐woven technology.

This study aims to discuss a context-aware system, SmartMedicist, which can recommend an alternative medicine from a set of available medicines present at a patient’s home for an unavailable medicine. The system is applied to the chronic disease patients only. The system requires only a smartphone, and provides a reminder to the patient to take medicine at appropriate times and to procure medicines from drug store. The system discusses the output method for the physically challenged patient. Although there are existing systems that can remind a patient for taking medicines, the authors are not aware of any such system that has the capability to recommend an alternative medicine for the prescribed medicine.

The study developed a pharmacology knowledge base that consists of a representation of a set of diseases, according to family, type and medicines, in a k-ary tree. An alternative medicine is recommended based on the set of available medicines and knowledge base.

We considered four diseases: Hypertension, Gastritis, Alzheimer’s disease, and Parkinson; and performed several experiments for each disease for the different number of available medicines. The execution time to find an alternative medicine (if any) in each case is around four seconds.

The proposed system is cost effective and affordable for most families in India. Although the proposed system is not a substitute of a doctor, this system will enhance the safety golden period for a patient to consult a doctor in the emergency exhaustion of the prescribed medicines.

Increasing board densities, decreasing spacing between holes and features and the growing requirement for printed circuit boards to perform in high temperature/high humidity environments have led to renewed concerns about possible reliability problems caused by the growth of Conductive Anodic Filaments (CAF). To date, there has been a lack of information on standardized test procedures and failure analysis methods for various types of prepregs and laminates.This paper introduces a standard test vehicle design and discusses suitable testing, failure analysis and board manufacturing methods. It also includes the requirements for CAF resistance and there is a discussion of material benchmarking tests with some preliminary results from this testing. These methods should be applicable to boards used in all market segments, including high density interconnect, and automotive applications.

The problem of concurrent thermal and vibration loading has not been thoroughly studied even though it is common in electronic packaging applications. Here we attempt to address such a problem using a damage mechanics based constitutive model. Damage mechanics constitutive model for eutectic Pb/Sn solder alloys is used to simulate the damage effects of concurrent cyclic thermal loads and vibrations on Ball Grid Array (BGA) packages. The model is implemented into the commercial finite element code ABAQUS through its user defined material subroutine capability. For the integration algorithm we have used a return mapping scheme, which dramatically improves the convergency rate as compared to previous implementations of the same model. Results are examined in terms of accumulation of plastic strain within the solder connections. It is shown that the simplistic Miner’s rule can not accurately account for the combined effect of both loadings acting concurrently.

The purpose of the present study was to review the thermo-mechanical challenges of reflowed lead-free solder joints in surface mount components (SMCs). The topics of the review include challenges in modelling of the reflow soldering process, optimization and the future challenges in the reflow soldering process. Besides, the numerical approach of lead-free solder reliability is also discussed.

Lead-free reflow soldering is one of the most significant processes in the development of surface mount technology, especially toward the miniaturization of the advanced SMCs package. The challenges lead to more complex thermal responses when the PCB assembly passes through the reflow oven. The virtual modelling tools facilitate the modelling and simulation of the lead-free reflow process, which provide more data and clear visualization on the particular process.

With the growing trend of computer power and software capability, the multidisciplinary simulation, such as the temperature and thermal stress of lead-free SMCs, under the influenced of a specific process atmosphere can be provided. A simulation modelling technique for the thermal response and flow field prediction of a reflow process is cost-effective and has greatly helped the engineer to eliminate guesswork. Besides, simulated-based optimization methods of the reflow process have gained popularity because of them being economical and have reduced time-consumption, and these provide more information compared to the experimental hardware. The advantages and disadvantages of the simulation modelling in the reflow soldering process are also briefly discussed.

This literature review provides the engineers and researchers with a profound understanding of the thermo-mechanical challenges of reflowed lead-free solder joints in SMCs and the challenges of simulation modelling in the reflow process.

The unique challenges in solder joint reliability, and direction of future research in reflow process were identified to clarify the solutions to solve lead-free reliability issues in the electronics manufacturing industry.

The mismatch of the thermal expansion coefficients of the materials in multiplayer structure may induce serious stress concentrations in electronic packaging. Experimental evaluation of the thermal stresses and strains in those electronic composites is becoming significantly important for optimizing design and failure prediction of the electronic devices.

Digital image correlation (DIC) technique was utilized to obtain thermal deformation filed of a BGA package. With the help of white light to illuminate the cross section of the BGA package, the gray images were taken from the rough surface of the specimen, that offer a kid of carrier pattern for the DIC processing with statistical resemblance in gray distributions. By using the algorithm of correlation computation, the DIC searched the matching spots in a pair of those images in which the spot displacements were involved in between, to obtain the deformation fields of the package specimen caused by temperature changes.

The results show interesting strain distributions in the assembly. Both the horizontal displacement component and its normal derivative are strongly related to the arrangement of the solder joints in the bonding medium between the die and the ceramic substrate. The strain components in the middle region of the package are larger than those in the side regions where the strain relaxation may exist near the stress‐free boundaries. The shear strain components show special bands of parallel lines with identical amount over the chip‐package to sustain the shearing of the packed structure under thermal loading.

The DIC technique shows to be a useful tool for the thermal strain analysis of the electronic packaging devices. Not only provides it the whole field deformation of the assembly, but also maintains the surface pictures of the package without covering any fringes, which is important to compare the deformation field with the specimen surface to reveal the stain distribution related to the failure prediction of the materials.

To present and discuss open trace defects uncovered in an FR4 assembly during electrical testing.

This paper presents open trace defects observed in FR4 assemblies and analyses the distribution of defects. The paper also discusses possible root causes for their occurrence.

The open trace defects that occurred during printed circuit board (PCB) fabrication should have been observed by the board manufacturer. It appears that the PCB manufacturer did not perform automatic optical inspection (AOI) and electrical testing during the manufacturing of the boards. The cost due to the rejected PCBAs was approximately 3x times that of the PCB cost.

The paper highlights the costly impact of uncovering a PCB defect after assembly. Based on the results of this study, the implementation of electrical testing and AOI for PCBs is recommended.

Eliminating lead in electronics is an environmentally considerate approach that is made prior to manufacture. Recently enacted legislation encourages increased recycling of electrical and electronic products. However, recycling is typically an end‐of‐use action occurring just before final disposal. From an environmentally‐considerate perspective, lead elimination or replacement is a better approach. Short of having a definitive study to follow, industry, regulators, and consumers are proceeding with the change. Various lead‐free alloys have been tested and used for electronic components and assemblies. There are many replacements for eutectic tin‐lead solder, and alloys containing tin, silver, copper, and bismuth have been used successfully. Assessing how the electronics industry is addressing the change to lead‐free materials and processes requires answers to various questions. These questions regard the effects of changes to electronic products and their processes. What drives lead‐free migration, how processes can develop, and when products will be available are issues which define the assessment.

This paper aims to investigate the fatigue life performance of SAC305 ball grid array solders under combined temperature and harmonic vibration loading conditions.

Fatigue tests were performed using a sine dwell with resonance tracking vibration and temperature loading experiment. Finite element stress analysis was also performed to help in understanding the observed failure trends.

Fatigue test results showed that the lead-free solders tend to fail quickly in higher temperatures and higher vibration loading test conditions. The failure analysis results revealed that in low temperatures, the solder cracks are initiated and propagated at the package side. However, in high temperatures, the cracks are observed at the board side of the interconnect. In all conditions, the cracks are propagated throughout the intermetallic compound layer.

In the published literature, there is a lack of data in the area of fatigue assessment of lead-free solders under combined temperature and vibration loadings. This paper provides useful insights into combined thermal/vibration fatigue, i.e. reliability behavior of lead-free solder joint types.