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The purpose of this paper is to derive the small-signal/canonical model derivation of the high-side active clamp forward converter (ACFC) with diode rectification for ideal and with resistive parasitics. It also covers the analysis of ACFC small-signal model with resistive parasitics using computer-aided modeling software Personal Computer Simulation Program with Integrated Circuit Emphasis (PSPICE) 16.6. The effects of variation of system parameters on the ACFC’s state transfer functions and operations have been highlighted in this paper.

The large-signal model and small-signal model of the ACFC with diode rectification has been derived using AC small-signal modeling approach.

The operating point of the converter changes with the consideration of resistive parasitics compared with the ideal case. The response obtained from the hardware matches with the time domain response of the averaged model and switch model developed in PSPICE.

This paper limits the study of ACFC small-signal behavior by using computer-aided design software PSPICE. The dead time of the converter is not considered because it is negligible when compared with the on and off time. The leakage inductance which plays a role in zero voltage switching of the ACFC switches is neglected in the analysis as it is very small compared to the magnetizing inductance. The switching losses are not considered in the modeling.

The mathematical computation of deriving the system transfer functions from canonical model is complex and time consuming.

The modeling with resistive parasitics improves the effectiveness of the equivalent model. Also, the analysis with computer-aided modeling software PSPICE gives reliable results in less time.

The paper aims to present a learning environment for optimal synthesis of voltage regulator circuits (LEOS‐VRC) using PSPICE simulator.

LEOS‐VRC supports a database with voltage regulator circuits edited as projects in PSPICE compatible format and a methodology for optimal synthesis. The methodology is based on the estimation of multiple voltage regulator circuits' realizations over a given specification, through comparative study in PSPICE, using a set of predefined specific electrical characteristics, which values are determined from simulation waveforms. LEOS‐VRC allows integrating the voltage regulator circuit in a power supply system through adding transformer, rectifier and control stages. Both linear and switch‐mode power supplies are considered.

The methodology and examples proposed illustrate the efficiency of LEOS‐VRC for teaching and self‐education in the area of power supply circuit design.

In future LEOS‐VRC database will be enlarged with new voltage regulator circuit topologies and new controller circuits.

LEOS‐VRC is suitable for students in electronics and designers of power supply circuits.

With LEOS‐VRC students become familiar with multisolution synthesis. By analyzing the complex behaviour of the power supply system and applying comparative study and optimization criteria, they can make a motivated selection of an optimal voltage regulator design solution for a concrete application.

This study involves the development of a PSPICE 5.4 package oriented model for the dynamic behaviour of a series excited synchronised slip ring induction motor including the bridge rectifier for rotor circuit excitation. Furthermore, in this study is aimed at investigating the synchronising behaviour for various rotor connections of a series excited synchronous motor formed by connecting a bridge rectifier input in series with the stator winding of a slip‐ring induction motor whereas the rectifier output feeds the rotor winding. The steady state behaviour of such a scheme in comparison to a separately excited one is well known, but the behaviour during synchronisation requires further study. Presentation of results obtained by a PSPICE based simulation and comparison with experimental results acquired during this study points to a model to account for design variations and additional circuitry. It is convenient to use this model in a drive system. The advantage of this simulation method over the others is that it does not involve the utilisation of specialised programs and mathematical difficulties such as the solution of stiff differential equations. Furthermore, steady state behaviour of the scheme is explained by means of a simple analysis and illustrated by test results.

The unsteady natural convection flow of a viscous dissipative fluid along a semi‐infinite vertical plate subjected to periodic surface temperature oscillation is investigated.

An electrical‐network model based on the Network Simulation Method is developed to solve the governing equations. The accuracy and effectiveness of the method are demonstrated.

The increasing of the viscous dissipation and the decreasing in the Prandtl number lead to a decrease in Nusselt number and an increase in the local skin‐friction. Also, it is found that the oscillations of the Nusselt number and of the local skin‐friction depend on the frequency and amplitude of the oscillating surface temperature. For Pr = 1,000 and ε = 0.005 (realistic case) the effect of the viscous dissipation is appreciable at large distances from the leading edge.

The inclusion of viscous dissipation in the energy equation, except of the theoretical interest, has applications in very special cases, for example, gases at very low temperature and also for high Prandtl number liquids.

The influence of the non‐uniformity of wall temperature on the heat transfer by natural convection along of the plate together with the viscous dissipation of the fluid are analysed by means of a new numerical technique based on the electrical analogy.

The aim of the paper is the formulation of a simple hysteresis model entirely based on generally accepted concepts.

According to this, the modelling of loops has been achieved by the application of the Langevin‐Weiss law of magnetization to transformer equivalent circuits. The loops are generated by the change of the phase of current, introduced by the resistance modelling iron loss. Differential circuit equations have been solved with the help of standard Mathcad procedures.

In spite of the simplicity of such approach, the accuracy of hysteresis loops and iron loss approximations is better than in PSpice simulations and the model can be easily extended to dynamic loops.

The application of the model is limited to lower frequencies, where the rise of frequency leads to the widening of the loops without the radical change of their shapes.

Presented approach may be useful in simplified analysis of low frequency transformer circuits and in the primary explanation of hysteresis phenomena for teaching purposes.

Contrary to other models based on saturation curves, the dynamic hysteresis loops presented in this paper are obtained with the use of basic laws and concepts, without the introduction of any additional assumptions and the separate treatment of the lower and upper branches of the loops.

This paper proposes a useful pseudo‐logarithmic circuit as a basic building block in the construction of a logarithmic amplifier made from piecewise approximations.

The circuit employs two operational and a handful of resistors, and mimics the logarithmic function over a predefined range. Control of the pseudo‐logarithmic function is achieved by a ratio of resistances defined as x, one of which may be digitally switched, or implemented by tunable transconductors. When controlled by digitally switched resistors, the circuit is particularly attractive because of the commercial availability of such resistors, and with the aid of simple control logic, individual blocks can be algebraically summed to extend the dynamic range of the basic pseudo‐logarithmic block which is 28 dB

Experimental results using off the shelf operational amplifiers (opamps) and a handful of resistors show that the circuit yields a maximum log error of 0.6915 dB for x in (0.22, 4.65).

Proposes a novel circuit capable of realizing the pseudo‐logarithmic function (x−1)/(1+x). The circuit is simple and easily implemented using readily available opamps.

The evaluation of currents in circuits with ferromagnetic cores leads to troublesome graphical or numerical procedures. These difficulties may be overcome by the introduction of a simple analytical approximation of the magnetization curve directly into the inductance of a circuit. In this way one can clearly describe currents in electric circuits and magnetic induction in a toroidal core (without an air‐gap), including magnetization due to eddy currents and some other effects not considered in the commercial PSpice program.

This paper aims to present a design of a single power supply, low voltage (1.2) high performance operational amplifier using 0.13 μm technology whose characteristics are superior compared to the other designs available in the literature.

The authors set out to design an operational amplifier whose characteristics will be superior to the current available designs in the literature. Because of potential applications, a single 1.2 V supply was used. The layout was obtained using Microwind 0.13 μm technology. The design was tested using PSPICE Version 10.0. Various amplifier parameters were obtained and are compared with the other single supply, low voltage amplifiers available in the literature.

The presented amplifier has better characteristics such as open loop gain, power supply rejection ratio, common mode rejection ratio, etc.

Since, 0.13 μm, 1.2 V technology has become standard in digital VLSI design, there is a great need for high performance operational amplifiers that operate off of 1.2 V for mixed signal applications in such areas as mobile phones.

The presented amplifier has better characteristics compared to few 1.2 V supply voltage amplifiers available in the literature.

In this paper, we study the effect on the performance of a single supply low voltage operational amplifier due to such a mismatch.

We start with a given set of specifications and design a MOSFET based operational amplifier meeting those specifications. We then compute various parameters of the operational amplifier using PSPICE to verify that the amplifier meets the specifications. We create mismatch in three characteristics of differential pair MOSFETs: zero biased threshold voltage (V_th0), channel length (L) and process transconductance parameter (K). The effect of the mismatch on two performance parameters: (a) differential mode gain and (b) output DC voltage is then studied.

The effects of mismatch in MOSFET characteristics on the performance of single supply low voltage operational amplifiers are studied. Circuit designers can use the results to design operational amplifiers and other analog circuits to minimize the effects of such a mismatch on the performance of their circuits. In some cases, such a mismatch may even be desirable to obtain a desired performance from the circuit.

Circuit designers can use the results to design operational amplifiers and other analog circuits to minimize the effects of such a mismatch on the performance of their circuits.

Effect of mismatch of the transistor characteristics on the performance of circuits rarely reported in literature. This study is presented to aid circuit designers in designing circuits with enhanced performance.