The paper aims to present a learning environment for optimal synthesis of voltage regulator circuits (LEOS‐VRC) using PSPICE simulator.
LEOS‐VRC supports a database with voltage regulator circuits edited as projects in PSPICE compatible format and a methodology for optimal synthesis. The methodology is based on the estimation of multiple voltage regulator circuits' realizations over a given specification, through comparative study in PSPICE, using a set of predefined specific electrical characteristics, which values are determined from simulation waveforms. LEOS‐VRC allows integrating the voltage regulator circuit in a power supply system through adding transformer, rectifier and control stages. Both linear and switch‐mode power supplies are considered.
The methodology and examples proposed illustrate the efficiency of LEOS‐VRC for teaching and self‐education in the area of power supply circuit design.
In future LEOS‐VRC database will be enlarged with new voltage regulator circuit topologies and new controller circuits.
LEOS‐VRC is suitable for students in electronics and designers of power supply circuits.
With LEOS‐VRC students become familiar with multisolution synthesis. By analyzing the complex behaviour of the power supply system and applying comparative study and optimization criteria, they can make a motivated selection of an optimal voltage regulator design solution for a concrete application.
Marinova, G. and Dimitrov, D. (2011), "Learning Optimal Synthesis of Voltage Regulators using PSPICE", COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, Vol. 30 No. 4, pp. 1433-1448. https://doi.org/10.1108/03321641111133307
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