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This paper aims to demonstrate the improved functionality of additive manufacturing technology provided by combining multiple processes for the fabrication of packaged electronics.

This research is focused on the improvement in resolution of conductor deposition methods through experimentation with build parameters. Material dispensing with two different low temperature curing isotropic conductive adhesive materials was characterised for their application in printing each of three different conductor designs, traces, z-axis connections and fine pitch flip chip interconnects. Once optimised, demonstrator size can be minimised within the limitations of the chosen processes and materials.

The proposed method of printing z-axis through layer connections was successful with pillars 2 mm in height and 550 µm in width produced. Dispensing characterisation also resulted in tracks 134 µm in width and 38 µm in height allowing surface mount assembly of 0603 components and thin-shrink small outline packaged integrated circuits. Small 149-µm flip chip interconnects deposited at a 457-µm pitch have also been used for packaging silicon bare die.

This paper presents an improved multifunctional additive manufacturing method to produce fully packaged multilayer electronic systems. It discusses the development of new 3D printed, through layer z-axis connections and the use of a single electrically conductive adhesive material to produce all conductors. This facilitates the surface mount assembly of components directly onto these conductors before stereolithography is used to fully package multiple layers of circuitry in a photopolymer.

The purpose of this paper is to present the power noise characteristics of a multilayer printed circuit board (PCB) in which discrete capacitors have been embedded.

Embedded technology has been implemented on a multilayer PCB to enhance the performance and functionality and to decrease the power noise. Decoupling capacitors were directly positioned on the inner power planes of a board, which resulted in low‐loop inductance through the minimized length of the interconnection from the chips to the PCB's power delivery network.

A low‐noise PCB was successfully designed and fabricated using an embedding process for the discrete decoupling capacitors. It was demonstrated that such an approach offers lower interconnection inductance and quiet noise performance, including highly efficient propagation noise suppression at wideband frequencies.

Most conventional simulation techniques offer expectations for the signal characteristics on the time domain to minimize bit error rates in application systems. Further development work will focus on the integrated simulation models including the equivalent circuits for the transmission line and power noise effects to improve the accuracy of the signal performance.

This paper presents a new approach for improving generating and propagating noise performance through the use of an embedded decoupling capacitor design methodology.

This study aims to characterize a novel glass/epoxy architecture sandwich structure for electronic boards. Understanding the thermo-mechanical behavior of these composites is important because it is possible to pre-determine whether defined “internal” thick laminates will be suitable for embedding components in the direction of the axis “z,” i.e. this method of manufacturing multilayer laminates can be used for incoming miniaturization in electronics.

Laminates with a low glass transition temperature (Tg) and high Tg with E-glass type were treated, tested and compared. Testing samples were manufactured by nonstandard two steps unidirectional lamination as a multilayer structure based on prepreg layers and as “a sandwich structure” to explore its effect on thermo-mechanical properties. The proposed tested method determines the time and temperature-dependent viscoelastic properties of the board by using dynamic mechanical analysis, thermo-mechanical analysis and three-point bend tests.

This testing method was chosen because the main property that promotes sandwich structure is their high stiffness. Glass/epoxy stiff and thermal stabile sandwich structure prepared by nonstandard two-stage lamination is proper for embedding components and the next miniaturization in electronics.

Compared with by-default applied glass-reinforced homogenous laminates, novel architecture sandwich structure is attractive because of a combination of strength, stiffness and all while maintaining the miniaturization requirement and multifunctional application in electronics.

This paper aims to investigate the usability of the nickel copper zinc ferrite with the composition Ni_0.4Cu_0.2Zn_0.4Fe_1.98O_3.99 for the realization of high-temperature multilayer coils as discrete components and integrated, buried function units in low temperature cofired ceramics (LTCC).

LTCC tapes were cast and test components were produced as multilayer coils and as embedded coils in a dielectric tape. Different metallization pastes are compared. The properties of the components were measured at room temperature and higher temperature up to 250°C. The results are compared with simulation data.

The silver palladium paste revealed the highest inductance values within the study. The measured characteristics over a frequency range from 1 MHz to 100 MHz agree qualitatively with the measurements obtained from toroidal test samples. The inductance increases with increasing temperature and this influence is lower than 10%. The characteristic of embedded coils is comparable with this of multilayer components. The effective permeability of the ferrite material reaches values around 130.

The research results based on a limited number of experiments; therefore, the results should be verified considering higher sample sizes.

The results encourage the further investigation of the material Ni_0.4Cu_0.2Zn_0.4Fe_1.98O_3.99 for the use as high-temperature ferrite for the design of multilayer coils with an operation frequency in the range of 5-10 MHz and operation temperatures up to 250°C.

It is demonstrated for the first time, that the material Ni_0.4Cu_0.2Zn_0.4Fe_1.98O_3.99 is suitable for the realization of high-temperature multilayer coils and embedded coils in LTCC circuit carriers with high performance.

The paper aims to deal with the benefits and challenges of 3D integration of electronics and mechanics as well as the special requirements in designing a system.

Three‐dimensional integration technology has been enabled by innovations in thermoplastic printed circuit board (PCB) materials and novel system integration. Furthermore, the integration of electronics and mechanics helps manage product creation, as design phases must be integrated and teamwork well organized. A multidisciplinary approach is another must in marketing technology, because any decision to incorporate an integrative technology in a product must be based on an understanding of the many forms of expertise involved in creating a product.

With a unique copper pattern for each 3D shape, inconvenient distortions can be controlled, as dedicated copper patterns enable designers to make efficient use of formable multilayer structures and advance an extra step in freedom of design. Findings are based on a working demonstrator.

Even if 3D multilayer design now lacks dedicated tools, software is likely to evolve to include all necessary functions.

Forming a multilayer PCB enables designers to free their imagination and to take advantage of numerous possibilities, including even futuristic shapes.

Three‐dimensional integration offers great potential for product design, although by definition and in terms of production technology 3D integration is an incremental change.

The purpose of this paper is to present a hybrid manufacturing system that integrates stereolithography (SL) and direct print (DP) technologies to fabricate three‐dimensional (3D) structures with embedded electronic circuits. A detailed process was developed that enables fabrication of monolithic 3D packages with electronics without removal from the hybrid SL/DP machine during the process. Successful devices are demonstrated consisting of simple 555 timer circuits designed and fabricated in 2D (single layer of routing) and 3D (multiple layers of routing and component placement).

A hybrid SL/DP system was designed and developed using a 3D Systems SL 250/50 machine and an nScrypt micro‐dispensing pump integrated within the SL machine through orthogonally‐aligned linear translation stages. A corresponding manufacturing process was also developed using this system to fabricate 2D and 3D monolithic structures with embedded electronic circuits. The process involved part design, process planning, integrated manufacturing (including multiple starts and stops of both SL and DP and multiple intermediate processes), and post‐processing. SL provided substrate/mechanical structure manufacturing while interconnections were achieved using DP of conductive inks. Simple functional demonstrations involving 2D and 3D circuit designs were accomplished.

The 3D micro‐dispensing DP system provided control over conductive trace deposition and combined with the manufacturing flexibility of the SL machine enabled the fabrication of monolithic 3D electronic structures. To fabricate a 3D electronic device within the hybrid SL/DP machine, a process was developed that required multiple starts and stops of the SL process, removal of uncured resin from the SL substrate, insertion of active and passive electronic components, and DP and laser curing of the conductive traces. Using this process, the hybrid SL/DP technology was capable of successfully fabricating, without removal from the machine during fabrication, functional 2D and 3D 555 timer circuits packaged within SL substrates.

Results indicated that fabrication of 3D embedded electronic systems is possible using the hybrid SL/DP machine. A complete manufacturing process was developed to fabricate complex, monolithic 3D structures with electronics in a single set‐up, advancing the capabilities of additive manufacturing (AM) technologies. Although the process does not require removal of the structure from the machine during fabrication, many of the current sub‐processes are manual. As a result, further research and development on automation and optimization of many of the sub‐processes are required to enhance the overall manufacturing process.

A new methodology is presented for manufacturing non‐traditional electronic systems in arbitrary form, while achieving miniaturization and enabling rugged structure. Advanced applications are demonstrated using a semi‐automated approach to SL/DP integration. Opportunities exist to fully automate the hybrid SL/DP machine and optimize the manufacturing process for enhancing the commercial appeal for fabricating complex systems.

This work broadly demonstrates what can be achieved by integrating multiple AM technologies together for fabricating unique devices and more specifically demonstrates a hybrid SL/DP machine that can produce 3D monolithic structures with embedded electronics and printed interconnects.

This review paper aims to introduce the inkjet printing as a tool for fabrication of flexible/wearable sensors. It summarizes inkjet printing techniques including various modes of operation, commonly used substrates and inks, commercially available inkjet printers and variables affecting the printing process. More focus is on the drop-on-demand printing mode, a strongly considered printing technique for patterning conductive lines on flexible and stretchable substrates. As inkjet-printed patterns are influenced by various variables related to its conductivity, resistivity, durability and dimensions of printed patterns, the main printing parameters (e.g. printing multilayers, inks sintering, surface treatment, cartridge specifications and printing process parameters) are reported. The embedded approaches of adding electronic components (e.g. surface-mounted and optoelectronic devices) to the stretchable circuit are also included.

In this paper, inkjet printing techniques for fabrication of flexible/stretchable circuits will be reviewed. Specifically, the various modes of operation, commonly used substrates and inks and variables affecting the printing process will be presented. Next, examples of inkjet-printed electronic devices will be demonstrated. These devices will be compared to their rigid counterpart in terms of ease of implementation and electrical behavior for wearable sensor applications. Finally, a summary of key findings and future research opportunities will be presented.

In conclusion, it is evident that the technology of inkjet printing is becoming a competitor to traditional lithography fabrication techniques, as it has the advantage of being low cost and less complex. In particular, this technique has demonstrated great capabilities in the area of flexible/stretchable electronics and sensors. Various inkjet printing methods have been presented with emphasis on their principle of operation and their commercial availability. In addition, the components of a general inkjet printing process have been discussed in details. Several factors affect the resulting printed patterns in terms of conductivity, resistivity, durability and geometry.

The paper focuses on flexible/stretchable optoelectronic devices which could be implemented in stretchable circuits. Furthermore, the importance and challenges related to printing highly conductive and highly stretchable lines, as well as reliable electronic devices, and interfacing them with external circuitry for power transmission, data acquisition and signal conditioning have been highlighted and discussed. Although several fabrication techniques have been recently developed to allow patterning conductive lines on a rubber substrate, the fabrication of fully stretchable wearable sensors remains limited which needs future research in this area for the advancement of wearable sensors.

The embedding of passive components such as resistors, capacitors and inductors within printed circuit boards (PCBs) is motivated, to a large extent, by the desire for increased miniaturisation of electronic goods. However, resistors and, to a lesser extent, inductors are heat generating devices, and the temperature developed within PCBs as the result of the operation of embedded passives is a significant aspect of the design of a multilayer PCB. Here we investigate, by simulation, temperature fields associated with operation of embedded resistors. It is shown that for board dimensions less than 2cm × 2cm temperatures achieved are higher than those associated with larger boards having identical structures and identical resistor heat generation. Detailed simulations are used to investigate the sensitivity of the temperature rises associated with embedded resistors to copper track coverage and to thermal coupling of the PCB to ambient on its upper and lower surfaces. The implications of these findings are discussed both in the context of the design of real PCBs and in the context of thermal simulation.

Low temperature cofired ceramics (LTCCs) combine the advantages of both multilayer substrates with excellent high‐frequency properties and a high‐conductivity metallisation. The possibility to realise passive components embedded in the glass ceramics increases the scale of integration. Inductors are designed as single‐layer (planar spiral) or multilayer (3D) arrangements of narrow conductive traces with useful values up to a few hundred nanohenry. This range makes them useful for high‐frequency applications. Although the conductor pastes used have a low resistance, the maximum quality factor of these coils seldom exceeds 60. The decisive parameter in this regard is the line thickness which is normally 10–15 μm. A novel technique based on laser scribed canals permits conductor patterns with an almost square cross‐section, thus reducing the line resistance by a factor up to 10. Coils manufactured by this method have a considerably improved quality and are able to withstand high currents. This property widens the range of applications for LTCCs into the field of high‐power electronics.