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Article
Publication date: 27 November 2007

Marika P. Immonen, Mikko Karppinen and Jorma K. Kivilahti

To investigate the influences of environmental stresses on board‐embedded polymeric waveguides.

Abstract

Purpose

To investigate the influences of environmental stresses on board‐embedded polymeric waveguides.

Design/methodology/approach

Optical multimode waveguides were embedded on printed circuit boards using commercial polymers. The optical‐PCBs varying in board structure and in optical build‐up materials were exposed to heat, moisture and ionic‐contaminants in accelerated reliability tests. The influence of stress factors on the structural integrity and functional parameters, namely the refractive index and optical transmissivity, was investigated at the key communication wavelengths.

Findings

Isothermal annealing reduced the refractive index to the greatest extent. The optical‐PCB structure with an optical surface build‐up layer was observed to be more vulnerable under temperature shock when compared with the optical‐PCB with optical inner layer. The buffer layer beneath the optical build‐up was found to improve the stability of the optical waveguides significantly. The results indicated of wavelength dependence to the aging factor with a failure mechanism. The factors affecting the performance and reliability of polymer‐based optical waveguides on PCBs were discussed.

Research limitations/implications

More experimental data and investigations of failure mechanisms are required to ultimately obtain sufficient reliability statistics for accurate life‐time prediction models.

Originality/value

Optical interconnects are seen as a promising solution to overcome performance limitations encountered with high‐frequency electrical interconnections. As an emerging technology, only a limited amount of reliability data on optical/electrical packages is available. The paper investigates the influences of environmental stresses on board‐embedded polymeric waveguides.

Details

Circuit World, vol. 33 no. 4
Type: Research Article
ISSN: 0305-6120

Keywords

Article
Publication date: 1 August 1998

Kari Kulojärvi, Vesa Vuorinen and Jorma Kivilahti

The dissolution processes and subsequent intermetallic reactions between high tin solder bump alloys and Cu‐ or Ni‐based UBM‐metallisations were investigated both theoretically…

Abstract

The dissolution processes and subsequent intermetallic reactions between high tin solder bump alloys and Cu‐ or Ni‐based UBM‐metallisations were investigated both theoretically and experimentally. The results showed that when the Cu UBM layer is used together with eutectic or higher Sn‐based solder alloys the dissolution of Cu and the rate of the Cu6Sn5 formation is too high for reliable interconnections. On the contrary, Ni provides feasible solution for UBM/high tin solder applications. Although there is strong chemical interaction between nickel and high Sn solder bump alloys, the dissolution and subsequent Ni3Sn4 layer growth rates are very low. Thus, a thin Ni layer can sustain interactions with high Sn liquid as well as solid solders during high temperature use. On the basis of the results obtained flip chip bonding with Ni‐based UBM structures provides a viable interconnection solution for reliable fine‐pitch applications.

Details

Microelectronics International, vol. 15 no. 2
Type: Research Article
ISSN: 1356-5362

Keywords

Article
Publication date: 1 August 1998

Kari Kulojärvi and Jorma Kivilahti

A new under bump metallurgy (UBM) solution consisting of the TiW‐, Au‐ and Ni‐layers for solder flip chip applications has been developed. The metallurgy, being based on the…

360

Abstract

A new under bump metallurgy (UBM) solution consisting of the TiW‐, Au‐ and Ni‐layers for solder flip chip applications has been developed. The metallurgy, being based on the well‐known TAB metallisation procedure, was modified by producing the galvanic nickel layer on the top of the Au‐TiW metallisation. Nickel is needed between high Sn liquid solder bumps and the Au layer to prevent fast and extensive dissolution of thin Cu or Au layers and consequently excessive intermetallic formation. The flip chip joints were manufactured, employing both the 60Sn40Pb‐ and pure Sn‐bumped chips together with the new UBM, which is relatively easy to implement into volume production. The different ageing tests demonstrated that reliable joints can be produced by using the UBM. On the basis of the results obtained the new UBM was found to be a significant improvement in the production of reliable flip chip joints.

Details

Microelectronics International, vol. 15 no. 2
Type: Research Article
ISSN: 1356-5362

Keywords

Article
Publication date: 1 March 1993

Dates: 23–24 March 1994 Venue: Palais des Congrès, Porte Maillot, Paris The Fifth Microelectronics Salon (Hybrids, SMT, ASICs, Packaging) will take place on the above dates. This…

Abstract

Dates: 23–24 March 1994 Venue: Palais des Congrès, Porte Maillot, Paris The Fifth Microelectronics Salon (Hybrids, SMT, ASICs, Packaging) will take place on the above dates. This showcase for manufacturers, suppliers of products and equipment, and sub‐contractors to all sectors of these industries will be accompanied by a series of conferences.

Details

Microelectronics International, vol. 10 no. 3
Type: Research Article
ISSN: 1356-5362

Article
Publication date: 21 June 2013

Fang Liu, Guang Meng and Junfeng Zhao

The purpose of this paper is to propose an alternative test board design with only one loading condition and sufficiently large sample size, which is more suitable for the…

Abstract

Purpose

The purpose of this paper is to propose an alternative test board design with only one loading condition and sufficiently large sample size, which is more suitable for the statistical package qualification. With the exception of the board shape and size and package component layout, all other aspects of the design strictly follow the JEDEC standard so that the board design can be easily implemented.

Design/methodology/approach

A test board in a round shape was introduced. First, drop tests were carried out. Then, the dye stain test and metallurgical analysis were performed in order to study the failure mechanism of lead‐free solder joint under drop impact.

Findings

The test results indicate that the combined effect of mechanical shock and PCB bending vibration is the root cause of solder joint failure under drop impact, and that the maximum peeling stress of the critical solder joint could be considered to be the dominant failure factor. On the other hand, the fracture of BGA lead‐free solder joints occurs at intermetallic compound (IMC) interface near the package side, and failure mode is brittle fracture.

Originality/value

These results are the same as those of JEDEC standard test board. Furthermore, the solder joint loading conditions in this design are simplified from six to one. The round test board can take the place of JEDEC standard test board to carry out drop test and to enable good solder joint life prediction and statistical analysis.

Details

Soldering & Surface Mount Technology, vol. 25 no. 3
Type: Research Article
ISSN: 0954-0911

Keywords

Article
Publication date: 27 May 2014

Jussi Putaala, Olli Salmela, Olli Nousiainen, Tero Kangasvieri, Jouko Vähäkangas, Antti Uusimäki and Jyrki Lappalainen

The purpose of this paper is to describe the behavior of different lead-free solders (95.5Sn3.8Ag0.7Cu, i.e. SAC387 and Sn7In4.1Ag0.5Cu, i.e. SAC-In) in thermomechanically loaded…

Abstract

Purpose

The purpose of this paper is to describe the behavior of different lead-free solders (95.5Sn3.8Ag0.7Cu, i.e. SAC387 and Sn7In4.1Ag0.5Cu, i.e. SAC-In) in thermomechanically loaded non-collapsible ball grid array (BGA) joints of a low-temperature co-fired ceramic (LTCC) module. The validity of a modified Engelmaier’s model was tested to verify its capability to predict the characteristic lifetime of an LTCC module assembly implementable in field applications.

Design/methodology/approach

Five printed wiring board (PWB) assemblies, each carrying eight LTCC modules, were fabricated and exposed to a temperature cycling test over a −40 to 125°C temperature range to determine the characteristic lifetimes of interconnections in the LTCC module/PWB assemblies. The failure mechanisms of the test assemblies were verified using scanning acoustic microscopy, scanning electron microscopy (SEM) and field emission SEM investigation. A stress-dependent Engelmaier’s model, adjusted for plastic-core solder ball (PCSB) BGA structures, was used to predict the characteristic lifetimes of the assemblies.

Findings

Depending on the joint configuration, characteristic lifetimes of up to 1,920 cycles were achieved in the thermal cycling testing. The results showed that intergranular (creep) failures occurred primarily only in the joints containing Sn7In4.1Ag0.5Cu solder. Other primary failure mechanisms (mixed transgranular/intergranular, separation of the intermetallic compound/solder interface and cracking in the interface between the ceramic and metallization) were observed in the other joint configurations. The modified Engelmaier’s model was found to predict the lifetime of interconnections with good accuracy. The results confirmed the superiority of SAC-In solder over SAC in terms of reliability, and also proved that an air cavity structure of the module, which enhances its radio frequency (RF) performance, did not degrade the reliability of the second-level interconnections of the test assemblies.

Originality/value

This paper shows the superiority of SAC-In solder over SAC387 solder in terms of reliability and verifies the applicability of the modified Engelmaier’s model as an accurate lifetime prediction method for PCSB BGA structures for the presented LTCC packages for RF/microwave telecommunication applications.

Details

Soldering & Surface Mount Technology, vol. 26 no. 3
Type: Research Article
ISSN: 0954-0911

Keywords

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