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High-temperature (HT°) motors are made with inorganic coils wound with a ceramic-coated wire. They must be carefully designed because the HT° insulating materials have a lower breakdown voltages than the polymers used for insulating standard machines.

The voltage distribution between stator coils is computed with high-frequency (HF) equivalent circuits that consider the magnetic couplings and the stray capacitances. Two time scales are used for getting a fast computation of very short voltage spikes. For the first step, a medium time scale analysis is performed considering a simplified equivalent circuit made without any stray capacitance but with the full PWM pattern and the magnetic couplings. For the second step, a more detailed HF equivalent circuit computes voltage spikes during short critical time windows.

The computation made during the first step provides the critical time windows and the initial values of the state variables to the second one. The rise and fall time of the electronic switches have a minor influence on the maximum voltage stress. Conversely, the connection cable length and the common-mode capacitances have a large influence.

HF equivalent circuits cannot be used with random windings but only to formed coils that have a deterministic position of turns.

The proposed method can be used designing of HT° machine windings fed by PWM inverter and for improving the coils of standard machine used in aircraft’s low-pressure environments.

The influence of grounding system of the DC link is considered for computing the voltage spikes in the motor windings.

The purpose of this paper is to present a method for computing voltage spikes endured by the insulation of the first coils of high-temperature (HT°) synchronous machines fed by PWM inverters that deliver fast-fronted voltage pulses.

The transient state following each steep edge is computed by SPICE using the global high-frequency (HF) equivalent circuit of the motor winding. This equivalent circuit is automatically built using the proposed elementary coil model. Two inorganic HT° technologies are compared: the first one uses a round copper wire insulated by a thin ceramic layer and the second one is made with an anodized aluminum strip.

The winding made with an anodized aluminum strip, which has a higher turn-to-turn capacitance, yields a better voltage distribution between coils of the machine.

The elementary coil equivalent circuit is computed from impedance measurements performed on an elementary coil. Another starting point could be developed with an FE analysis to determine the parameters of the HF equivalent circuit, which would avoid the need for a prototype coil before the machine design.

For inorganic motors, the insulation layers have poorer electrical characteristics compared with standard organic ones. Therefore, the computation of voltage spikes distribution along the coils of each phase represents a major issue in the design of HT° machines.

The presented approach is a step toward the design of HT° (400-500°C) actuators fed by PWM inverters based on fast SiC electronic switches.

Computers need clean, reliable, electrical power. The various faults of electrical power, such as spikes, sags, outages, noise, frequency variations, and static electricity, are defined and described. Preventive measures that computer users can employ to reduce the potential of electrical problems are discussed, as are the processes for detecting, diagnosing, and curing electrical problems when they do occur. Sidebars consider: transformers; power distribution units (PDUs); surge currents/ linear and non‐linear loads; and sizing the power conditioning system. The next issue will conclude this series with an article on uninterruptible power supplies and a bibliography.

Uninterruptible Power Supply (UPS) systems are typically designed to provide power to computers for five to thirty minutes after all utility company power has failed. In addition to providing blackout and brownout protection, many UPS systems also protect against spikes, surges, sags, and noise, and some also offer many of the features found in power distribution units (PDUs). The major components or subsystems of a typical UPS system are detailed, and a sample bid specification is appended. Three sidebars discuss UPSs and air conditioning, the maintenance bypass switch (MBS), and literature for further reading.

The purpose of this paper is to study very fast transient overvoltages (VFTOs) in the secondary winding of air‐cored Tesla transformers and also study the resulting electric field stresses.

An exhaustive model based on Multi‐conductor Transmission Lines (MTLs) theory has been used. The governing telegraphist's equations have been solved by Finite Difference Time Domain (FDTD) method.

The results demonstrated that there are some overvoltages at the end and middle turns that should be considered in insulation design. The magnitudes of these overvoltages are several times more than the steady state value of the corresponding turn which cause very high electric field stresses.

The paper describes results obtained from an original and innovative implementation of FDTD method in transmission line modelling and is applied properly to air‐cored pulse transformers.

The purpose of this paper is to describe the application of low‐glitch current cell in a digital to analog converter (DAC) to reduce the clock‐feedthrough effect and achieve a low power consumption.

A low‐glitch current switch cell is applied in a ten‐bit two‐stage DAC which is composed of a unary cell matrix for six most significant bits and a binary weighted array for four least significant bits (LSBs). The current cell is composed of four transistors to neutralize the clock‐feedthrough effect and it enables DAC to operate in good linearity and low power consumption. The prototype DAC is being implemented in a 0.35μm complementary metal‐oxide semiconductor process. The reduction in glitch energy and power consumption has been realized by preliminary experiment and simulation.

Compared to conventional current cell, more than 15 per cent reduction of glitch energy has been obtained in this work. The DAC is estimated that differential nonlinearity is within 0.1 LSB and the maximum power consumption is 68 mW at the sampling frequency of 100 MHz.

Comparison with other conventional work indicates that the current cell proposed in this paper shows much better performance in terms of switching spike and glitch, which may come from the extra dummy transistor in cell and reduce the clock‐feedthrough effect.

The purpose of this study is to help the researchers, public, industries and government to realize the tremendous trends to improve the power quality of both sources and load side.

The work carried out in the Facts device and power quality issues.

Maintaining the quality of electric power is always a challenging task. The effect of power electronics devices leads to improper power quality. The use of FACTS devices is preferably the best approach to treat power-quality-related problems. Usually, all FACTS devices are constructed to operate on the side of either the source side or the load.

This paper explores a broad comprehensive study of various types of power quality problems and classification of FACTS devices with its recent developments. Furthermore unified power quality conditioner (UPQC) is particularly reviewed to highlight the advantages over other compensating devices. An exhaustive study of literature has been carried out and most significant concepts are presented

Transient surge suppressors, to protect aircraft electrical and electronic equipment from large amplitude voltage surges and spikes, have been introduced by G.E.C. (Electronics) Ltd., East Lane, Wembley, Middlesex. Based on a new type of circuit configuration using combinations of transistors and resistors, the unit, used in conjunction with LC filters, has been ordered for the Beagle B.206.

This paper aims to clarify the relationship between stator tooth shape and DC voltage fluctuation of a double salient hybrid excitation generator (DSHEG). It analyzes the asymmetrical characteristics of the magnetic circuit and inductance between each phase. The study aims to reduce voltage fluctuation by using a stator shape optimization scheme, which helps reducing inductance difference.

This paper opted for a method combined with theoretical analysis, simulation and experimental verification. The stator tooth optimization scheme is given based on theoretical asymmetrical analysis and Taguchi method. A series of two-dimensional finite element analysis simulation of different conditions are conducted. Two prototypes with different stator tooth shape are made and experiments are carried out.

The paper provides empirical insights into how the stator tooth shape influences the asymmetry of inductance and DC voltage fluctuation. Compensation adjustments to the stator tooth shape can narrow the inductance differences of each phase. It suggests that “LTL” shaped DSHEG has lower voltage ripple than “III” shaped DSHEG without sacrificing output power.

Because of the chosen research approach, the gap between magnets and stator and end effect are not considered. Errors exist between simulation and experimental results.

The paper includes implications for other “C” shaped tooth optimization. Study on phase asymmetry of the special machine can further improve quality testing and simplify control strategy.

This paper analyzes the asymmetry of DSHEG and proposes an optimized stator tooth shape to reduce DC voltage fluctuation.

A cascaded observer-based transfer delay frequency locked loop (CODFLL) algorithm is developed to control the distribution static compensator (DSTATCOM) to address various power quality (PQ) issues arise because of distorted grid and load conditions. Moreover, frequency locked loop is included along with the observer to take care of the frequency drift from nominal value and to improve its performance during steady state and transient conditions. During daylight, the proposed system works as photovoltaic (PV) DSTATCOM and performs multiple functions for improving PQ whilst transferring power to grid and load. The system under consideration acts as DSTATCOM during night and bad weather condition to nullify the PQ issues.

CODFLL control algorithm generates reference signal for hysteresis controller. This reference signal is compared with an actual grid signal and a gate pulse is produced for a voltage source converter. The system is made frequency adaptive by transfer delay adaptive frequency locked loop (FLL). Peak power is extracted from a PV source using the perturb and observe technique irrespective of disturbances encountered in the system.

The PV system’s performance with the proposed controller is studied and compared with conventional control algorithms such as least mean fourth (LMF), improved second-order generalized integrator frequency locked loop (ISOGI-FLL), synchronous reference frame phased lock loop (SRF-PLL) and frequency adaptive disturbance observer (DOB) for different cases, for example, steady-state condition, dynamic condition, variable insolation, voltage sag and swell and frequency wandering in the supply side. It is found that the proposed method tracks the frequency variation faster as compared to ISOGI-FLL without any oscillations. During unbalanced loading conditions, CODFLL exhibits zero oscillations. Harmonics in system parameters are reduced to the level of IEEE standard; unity power factor is maintained at the grid side; hassle-free power flow takes place from the source to the grid and load; and consistent voltage profile is maintained at the coupling point.

CODFLL control algorithm is developed for PV-DSTATCOM systems to generate a reference grid current.