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Critical processing steps of COB manufacturing, as implemented at Epitek, are reported. They include testing of incoming boards, cleaning, bonding parameters, bonding defects and statistical process control.

The visit to the Ibiden Company in Ogaki gave me the opportunity to see at first hand a part of the industry which has participated in the technological and economic miracle of post‐war Japan. It was a chance, too, to see something of the far‐reaching differences in working attitudes and methods which have no doubt contributed to this spectacular success, which has placed Japanese technological exports in a leading position in virtually every part of the world.

This paper discusses the future trends of electronic interconnections to produce electronic equipment being manufactured in the Far East. Reviewed are details of simplistic circuits, as well as relatively complex multilayer boards used in new computer technology. The size of the market, techniques for component assembly, and various other aspects of the approach to electronic packaging are discussed.

As requirements for system performance and density increase, more attention is being given to chip‐on‐board (COB) packaging techniques. COB is ‘surface mount packaging taken to the extreme’ as it involves the direct mounting of bare semiconductor die to printed circuit board substrates. In this paper, the ‘thermal resistance’ of a single COB package is proposed. An analytical model for this resistance is developed for a multilayer board configuration using a combination of Fourier transform and adjoint‐solution techniques. Parameters in the model include the chip and board geometric parameters, individual layer unit conductances, and top and bottom surface film coefficients. A series of curves are developed from the model. These curves may be used in the initial design process to determine, for example, required film coefficients and the efficacy of adding thermal planes to the board. The model is also used to test the adequacy of the ‘effective series conductivity’ of a multilayer board.

The purpose of this paper is to investigate the effect of different soldering temperatures on the performance of chip-on-board (COB) light sources during vacuum reflow soldering.

First, the influence of the void ratio of the COB light source on the steady-state voltage, luminous flux, luminous efficiency and junction temperature has been explored at soldering temperatures of 250°C, 260°C, 270°C, 280°C and 290°C. The COB chip has also been tested for practical application and aging.

The results show that when the soldering temperature is 270°C, the void ratio of the soldering layer is only 5.1%, the junction temperature of the chip is only 76.52°C, and the luminous flux and luminous efficiency are the highest, and it has been observed that the luminous efficiency and average junction temperature of the chip are 107 lm/W and 72.3°C, respectively, which meets the requirements of street lights. After aging for 1,080 h, the light attenuation is 84.64% of the initial value, which indicates that it has higher reliability and longer life.

It can provide reference data for readers and people in this field and can be directly applied to practical engineering.

The purpose of this paper is to investigate the thermal behaviors of high power LED packages to enhance the thermal performances of low temperature co‐fired ceramic chip on board (LTCC‐COB) package. Thermal analysis demonstrated an improved LTCC‐COB package design that is comparable to a metal lead frame package with low thermal resistance.

The LED device developed in this study is a LTCC package mounted directly on the metal PCB. A numerical simulation was performed to investigate the thermal characteristics of the LED module using the finite volume method, which is embedded in commercial software (Fluent V.6.3). Thermal resistance and temperature measurement validate the simulated results.

The effect of the thickness of the die attach material on the thermal resistance was dominant due to low thermal conductivity, and the junction temperature decreased significantly with slight increases in thermal conductivity, especially when the value was less than 5 W/mK. The results reveal that the thermal resistance of MCPCB is about 49 per cent‐58 per cent of the junction to board thermal resistance. The thermal model results showed good agreement with experimental results.

The developed model overcomes the large thermal resistance of a conventional LTCC package for high power LED module. The extensive results have demonstrated an improved thermal design, optimal dimensions of each component and boundary conditions for high power LTCC‐COB type package.