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This paper aims to analyze the impact of non-perfect reference plane on the integrity of microstrip differential signals at multi-gigabit transmission on a printed circuit…
This paper aims to analyze the impact of non-perfect reference plane on the integrity of microstrip differential signals at multi-gigabit transmission on a printed circuit board (PCB). The effects of non-perfect reference contributed by signal crossing over split plane such as impedance discontinuity and crosstalk are investigated by performing analysis in two phases.
The first phase involves three-dimensional electromagnetic modeling extraction using Keysight EMPro software. Meanwhile, the second phase involves the import of model extracted from EMPro into simulation using Keysight Advanced Design System that covers insertion loss, return loss, crosstalk, time domain reflectometry and eye diagram.
A non-perfect reference plane has a negative impact on signal reflection, attenuation and crosstalk. The analysis results are presented and discussed in detail in the later section of this paper.
The work that studied the impact of the width and the amount of gaps due to crossing of split planes being experienced on the signal integrity was performed by other researchers. Meanwhile, this paper focused on the impact of length and depth of the gap on signal integrity. These research papers serve as a reference guide for high-speed PCB layout design.
This paper aims to analyze the negative impact of surface mount (SMT) pad and imperfect via structure such as stub, pad, non-functional pad (NFP) and anti-pad on the…
This paper aims to analyze the negative impact of surface mount (SMT) pad and imperfect via structure such as stub, pad, non-functional pad (NFP) and anti-pad on the signal integrity at 40 Gbps transmission on printed circuit board (PCB) due to impedance mismatch or discontinuity. The optimized modeling of via and SMT structures is performed to achieve minimal impedance mismatch and insertion loss less than 10 dB for six-inch full path transmission line between transmitter and receiver on PCB at Nyquist frequency 20 GHz.
This work is split into two phases. The first phase involves optimization of via and SMT structures in three-dimensional electromagnetic (3DEM) simulation using Hyperlynx Via Wizard and Keysight EMPro software, respectively, followed by analysis of time domain reflectometry (TDR) and insertion loss (Sdd21). Whereas, in the second phase, full path hybrid mode simulation involving vias for signal layer transition, a 6-inch PCB channel and SMT pads is performed using Keysight ADS software to observe the TDR, Sdd21 and eye diagram at 40 Gbps transmission.
Imperfect via and SMT structures have a negative effect on signal reflection and attenuation. The optimized via and SMT minimizes the impedance mismatch by 81 per cent and insertion loss by 4.5 dB, ultimately enlarging the eye diagram opening to achieve minimal data loss at receiver with 40 Gbps transmission.
The results of original empirical research work on signal integrity analysis that optimizes the PCB channel design to achieve 40 Gbps signal transmission are presented in this study. It serves as a reference guide for high-speed PCB layout design.