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Article
Publication date: 1 April 1992

J.J. Davignon and F. Gray

The tenting of via holes has been a controversial issue in the military arena for several years. This issue has gained importance with MIL‐STD‐2000's requirement that all…

Abstract

The tenting of via holes has been a controversial issue in the military arena for several years. This issue has gained importance with MIL‐STD‐2000's requirement that all circuitry and vias under components be coated to preclude entrapment of flux. This paper addresses this issue by evaluating the MIL‐Spec thermal shock reliability of solder mask as a hole fill material and as a via tent cover. The relationship of via hole to pad size on tent reliability and solder mask thickness is also investigated. This paper concludes that solder mask as a hole fill material will not pass military thermal shock requirements and that standard dry film solder mask is very sensitive to via hole and pad dimensions. The thinner and more flexible high conformance solder mask is the only material capable of passing MIL‐Spec thermal shock requirements for all via hole to pad relationships.

Details

Circuit World, vol. 19 no. 1
Type: Research Article
ISSN: 0305-6120

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Article
Publication date: 22 June 2012

Yong‐Won Lee, Keun‐Soo Kim and Katsuaki Suganuma

To propose a solution procedure to minimize/eliminate tombstoning defects in small chip components with different micro via‐in pad designs for high density module assembly.

Abstract

Purpose

To propose a solution procedure to minimize/eliminate tombstoning defects in small chip components with different micro via‐in pad designs for high density module assembly.

Design/methodology/approach

Four different micro via‐in pad designs were compared (via‐hole diameter): ultra small via‐in pads (10 μm), small via‐in pads (20 μm) and large via‐in pads (60 μm), as well as designs with no via‐in pads and capped via‐in pads. Two process variables were also evaluated for the goal of achieving a high‐yield assembly solution in micro via‐in pad and lead‐free solder conditions. Potential factors such as the preheat conditions of the reflow profile and stencil aperture size, which might affect tombstoning in components with micro via‐in pads, were investigated.

Findings

The results indicated that the micro via‐in pad design significantly increased the tombstoning; thus, tombstoning did not occur in components with both no via‐in pads and capped via‐in pads. Capped via‐in pads exhibited the best results in preventing tombstoning and provided a wide process window for the selection of process parameters. The results showed that tombstoning was found to decrease with both increasing stencil opening ratio and use of reflow profile with long‐preheat condition.

Originality/value

The paper's findings provide certain process guidelines for high density module assemblies with via‐in pad design. The strategy is to prevent tombstoning by adopting capped via‐in pad design if possible when employing micro via‐in pad technology.

Details

Soldering & Surface Mount Technology, vol. 24 no. 3
Type: Research Article
ISSN: 0954-0911

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Article
Publication date: 1 January 2006

Ming‐Sze Tong, Yinchao Chen, Yilong Lu, Hyeong‐Seok Kim, Tae‐Gyu Chang and Ronan Sauleau

To study the photonic band‐gap (PBG) characteristics constructed by periodic conducting vias on various guided transmission‐line structures.

Abstract

Purpose

To study the photonic band‐gap (PBG) characteristics constructed by periodic conducting vias on various guided transmission‐line structures.

Design/methodology/approach

The finite difference time domain (FDTD) method is adopted to analyze various PBG via structures. Conventionally, PBG characteristics on guided‐wave structures, such as microstrip lines or coplanar waveguides (CPW), are constructed through a series of perforations on the ground plane(s). PBG characteristics can, however, also be realized through periodic arrangements of conducting vias located on the respective ground planes.

Findings

Through studies of the scattering parameters, it has been found that all analyzed PBG via structures exhibit strong band‐gap characteristics in a particular frequency range. Different harmonic patterns are also observed when the dimensional sizes of the conducting vias vary with respect to the PBG period.

Research limitations/implications

Research has been mainly limited to study solely the PBG via structures, guided‐wave transmission lines. More studies may be conducted in analyzing the overall performance when they are combined with other microwave components.

Practical implications

The proposed PBG via structures can be applied to various microwave areas, ranging from signal suppressions in microelectronics and mobile communications, to electro‐magnetic interference studies in other practical electronic circuit structures.

Originality/value

The ideas of applying conducting vias on the guided‐wave transmission lines and the proposed via patterns to induce the PBG characteristics are the research's claim to originality one.

Details

Microelectronics International, vol. 23 no. 1
Type: Research Article
ISSN: 1356-5362

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Article
Publication date: 1 September 2004

Cheng‐Ching Yeh, Kuo‐Hsing Lan, Wei‐Ping Dow, Jui‐Hsia Hsu, Cliff Lee, Chih‐Hao Hsu, Ken Lee, Jordan Chen and Philip Lu

The trend of electronic products toward lighter, thinner, and faster transmission is challenging the printed circuit board industry to incorporate high density…

Abstract

The trend of electronic products toward lighter, thinner, and faster transmission is challenging the printed circuit board industry to incorporate high density interconnection technology (such as build‐up and semi‐additive processes). Micro stacked via is one technology utilized to produce high‐density structures. Dielectric resin, conductive paste or via plating are usually applied for the filling process. As compared with other filling methods, via filling plating technology has advantages in offering a shorter process and higher reliability. This paper discusses the influence of different equipment design, operating conditions and additives on via filling plating technology.

Details

Circuit World, vol. 30 no. 3
Type: Research Article
ISSN: 0305-6120

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Article
Publication date: 1 February 1989

D.G. DeNure

The demand for higher density circuit packs, limited mounting space, faster switching times and cost‐effective designs has encouraged designers to take another look at…

Abstract

The demand for higher density circuit packs, limited mounting space, faster switching times and cost‐effective designs has encouraged designers to take another look at placing vias directly in the mounting pads of reflow soldered surface mounted components. The standard reasons for not putting vias in pads (V‐I‐P) such as solder wicking and joint integrity were addressed and found to be surmountable. A study was performed to investigate the effects that a via in the mounting pad(s) has on the solder joint of both discrete components and gull and J‐leaded ICs. The size of the via was varied as well as the location along the centre axis of the pad. It was found that the via diameter is a critical parameter while the via location has no noticeable effect on the solder joint. Different assembly methods were also investigated. Several of the assembled test boards are being subjected to thermal cycling to determine the joint reliability. The results of this study are reported in this document.

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Soldering & Surface Mount Technology, vol. 1 no. 2
Type: Research Article
ISSN: 0954-0911

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Article
Publication date: 1 February 1990

D. Volfson and S.D. Senturia

This paper describes a process for fabricating high density multilayer polyimide‐metal interconnect structures for packaging applications such as multichip carriers, flex…

Abstract

This paper describes a process for fabricating high density multilayer polyimide‐metal interconnect structures for packaging applications such as multichip carriers, flex circuits and multiconductor TAB tape. The process combines the advantages of a semi‐additive via process, such as the uniformity of the electroplated vias and the ability to produce vertical stacked‐up vias, with a processing sequence that does not require a temporary plating mask for vias or a planarisation/via‐top‐exposure step. The key idea behind the process is the fact that all of the circuitry in a multilayer interconnect is electrically connected to the upper conductor layer. This allows building the interconnect upside down on a temporary substrate using a continuous bottom level metallisation as an electrode for plating all level vias. This layer eventually becomes the upper conductor. After the processing is complete, the multilayer interconnect structure is either released from the temporary substrate, resulting in a multilevel multichip interconnect. After the multilevel structure is released, the continuous metal, which was on the bottom, is patterned with the upper conductor pattern, isolating the individual circuits. As an example, a process sequence for building a three‐metal‐layer substrate with 5 ?m by 30 ?m copper conductors, 50 ?m by 50 ?m square vias with 15 ?m interlayer polyimide is presented along with electrical test data. The process can be extended to producing mixed‐geometry multiconductor tape structures for TAB that result in tape frames with controlled conductor properties, and offer the potential for finer geometries for TAB fingers than are now available through conventional TAB tape processes.

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Circuit World, vol. 16 no. 3
Type: Research Article
ISSN: 0305-6120

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Article
Publication date: 16 August 2013

Yuanming Chen, Wei He, Guoyun Zhou, Zhihua Tao, Yang Wang and Daojun Luo

Pb‐free soldering challenged printed circuit board (PCB) assembly with high temperature. The purpose of this paper is to explain the failure mechanism of printed circuit…

Abstract

Purpose

Pb‐free soldering challenged printed circuit board (PCB) assembly with high temperature. The purpose of this paper is to explain the failure mechanism of printed circuit board (PCB) assembly with solder bubbles of vias to avoid the problems of via‐drilling defects and solder joint failure.

Design/methodology/approach

The failure of PCB vias with solder bubbles was investigated through cross sections and SEM microstructure inspection, TMA measurement, moisture absorption analysis and DSC measurement. The moisture absorption and CTE of FR4 laminate matched with manufacturing requirement to avoid the effects of solder bubbles. The effects of via drilling with a dull drill bit were compared to that with a new drill bit.

Findings

The moisture absorbed inside holes of via plating layers could be exposed to induce solder bubbles during Pb‐free soldering assembly and dull drill bits should be prevented during the drilling process to avoid the no‐bearing drilling effects.

Originality/value

The failure of PCB vias is not only involved in the voiding in solder joints but manufacturing processes of PCB. The paper designs an approach to analyse the properties of PCB materials and the drilling effects of vias to find out the mechanism resulting in solder bubbles of vias. The problem of drill bits should be considered to prevent the moisture absorbed in drilling vias with defects.

Details

Circuit World, vol. 39 no. 3
Type: Research Article
ISSN: 0305-6120

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Article
Publication date: 1 June 2003

Mark Lefebvre, George Allardyce, Masaru Seita, Hideki Tsuchida, Masaru Kusaka and Shinjiro Hayashi

This paper describes a copper electroplating enabling technology for filling microvias. Driven by the need for faster, smaller and higher performance communication and…

Abstract

This paper describes a copper electroplating enabling technology for filling microvias. Driven by the need for faster, smaller and higher performance communication and electronic devices, sequential build up (SBU) technology has been adopted as a viable multilayer printed circuit manufacturing technology. Increased wiring density, reduced line widths, smaller through‐holes and microvias are all attributes of these high density interconnect (HDI) packages. Filling the microvias with conductive material allows the use of stacked vias and via in pad designs. Other potential design attributes include thermal management enhancement and benefits for high frequency circuitry. Electrodeposited copper can be utilized for filling microvias and provides potential advantages over alternative via plugging techniques. The features, development, scale up and results of direct current (DC) and periodic pulse reverse (PPR) acid copper via filling processes, including chemistry and equipment, are described.

Details

Circuit World, vol. 29 no. 2
Type: Research Article
ISSN: 0305-6120

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Book part
Publication date: 3 December 2014

Annette Aurélie Desmarais, Marta G. Rivera-Ferre and Beatriz Gasco

This chapter examines La Vía Campesina’s strategy of consolidating strategic alliances in its global struggle to build food sovereignty. After discussing some of La Vía

Abstract

This chapter examines La Vía Campesina’s strategy of consolidating strategic alliances in its global struggle to build food sovereignty. After discussing some of La Vía Campesina’s initial challenges in working with nongovernmental organizations we focus on two case studies: first, La Vía Campesina’s work with Veterinarios Sin Fronteras, based in Spain, and second, the International Planning Committee on Food Sovereignty. In both cases we analyze some of the convergences and divergences experienced by the social actors in efforts to build strategic alliances.

Details

Alternative Agrifood Movements: Patterns of Convergence and Divergence
Type: Book
ISBN: 978-1-78441-089-6

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Book part
Publication date: 10 December 2015

Dekar Urumsah

The concept and practice of e-services has become essential in business transactions. Yet there are still many organizations that have not developed e-services optimally…

Abstract

The concept and practice of e-services has become essential in business transactions. Yet there are still many organizations that have not developed e-services optimally. This is especially relevant in the context of Indonesian Airline companies. Therefore, many airline customers in Indonesia are still in doubt about it, or even do not use it. To fill this gap, this study attempts to develop a model for e-services adoption and empirically examines the factors influencing the airlines customers in Indonesia in using e-services offered by the Indonesian airline companies. Taking six Indonesian airline companies as a case example, the study investigated the antecedents of e-services usage of Indonesian airlines. This study further examined the impacts of motivation on customers in using e-services in the Indonesian context. Another important aim of this study was to investigate how ages, experiences and geographical areas moderate effects of e-services usage.

The study adopts a positivist research paradigm with a two-phase sequential mixed method design involving qualitative and quantitative approaches. An initial research model was first developed based on an extensive literature review, by combining acceptance and use of information technology theories, expectancy theory and the inter-organizational system motivation models. A qualitative field study via semi-structured interviews was then conducted to explore the present state among 15 respondents. The results of the interviews were analysed using content analysis yielding the final model of e-services usage. Eighteen antecedent factors hypotheses and three moderating factors hypotheses and 52-item questionnaire were developed. A focus group discussion of five respondents and a pilot study of 59 respondents resulted in final version of the questionnaire.

In the second phase, the main survey was conducted nationally to collect the research data among Indonesian airline customers who had already used Indonesian airline e-services. A total of 819 valid questionnaires were obtained. The data was then analysed using a partial least square (PLS) based structural equation modelling (SEM) technique to produce the contributions of links in the e-services model (22% of all the variances in e-services usage, 37.8% in intention to use, 46.6% in motivation, 39.2% in outcome expectancy, and 37.7% in effort expectancy). Meanwhile, path coefficients and t-values demonstrated various different influences of antecedent factors towards e-services usage. Additionally, a multi-group analysis based on PLS is employed with mixed results. In the final findings, 14 hypotheses were supported and 7 hypotheses were not supported.

The major findings of this study have confirmed that motivation has the strongest contribution in e-services usage. In addition, motivation affects e-services usage both directly and indirectly through intention-to-use. This study provides contributions to the existing knowledge of e-services models, and practical applications of IT usage. Most importantly, an understanding of antecedents of e-services adoption will provide guidelines for stakeholders in developing better e-services and strategies in order to promote and encourage more customers to use e-services. Finally, the accomplishment of this study can be expanded through possible adaptations in other industries and other geographical contexts.

Details

E-services Adoption: Processes by Firms in Developing Nations
Type: Book
ISBN: 978-1-78560-709-7

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