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This paper aims to examine the impacts of macroprudential policy on the shadow economy worldwide.

We compile a panel dataset covering 125 countries from 1990 to 2018. This paper mitigates potential endogeneity issues via two-stage least squares and the two-step generalized method of moments (GMM).

The robust results show that the overall tightening of macroprudential policies exerts an expansion impact on the shadow economy. Further examination of the 16 individual macroprudential policy instruments finds that loan restrictions, countercyclical buffers, surcharges for systemically important financial institutions and capital conservation buffers have positive and statistically significant effect on the shadow economy. This relationship is only present during tightening episodes of macroprudential policy as loosening episodes do not exhibit any significant impact. Finally, this paper documents the nonlinear effects of macroprudential policy.

The results suggest that the supervisory authorities may need to consider another parameter, which is the development of the shadow economy, when devising the optimal macroprudential policy responses.

To the best of the authors’ knowledge, this paper is likely the first to empirically document the impact of macroprudential policy on the shadow economy. It contributes to the growing literature on the potential side effects of macroprudential policy on the macro-economy.

Optimizing manufacturing processes addresses operational challenges and yields significant benefits across the business spectrum. This study aims to comprehensively analyze a manufacturing process through value stream mapping (VSM), aiming to streamline operations, reduce production lead times and minimize work-in-process (WIP) inventory levels. These improvements directly enhance competitiveness, customer satisfaction and overall business success, enabling a swift response to market demands, timely delivery of high-quality products and cost-effectiveness.

The approach integrates current and future-state VSM concepts with Lean tools across four stages: problem definition, current-state VSM analysis, future-state VSM design and improvement implementation. A team assembled to improve the manufacturing process for electronic devices has successfully implemented this approach.

Implemented improvements significantly reduced WIP inventory (88.8% equivalent to $572,171 annually) and production lead time (from 28.26 to 3.21 days), enhancing operational flexibility and competitiveness. Streamlined processes led to a 13% decrease in cycle time and a notable reduction in daily rework (63.6%), amounting to $118,127 annually. Labor reduction (45.5%) yielded annual savings of approximately $594,000, with affected individuals successfully transitioning to other roles, highlighting the effectiveness of lean methodologies without job cuts.

This initiative exemplifies the effective use of VSM and Lean tools in optimizing an electronic device manufacturing operation that produces 43 products across various processes. By leveraging these methodologies, this research offers valuable insights into enhancing production efficiency, resulting in shorter production lead times, reduced cycle times and significant decreases in WIP inventory and rework.

Radio frequency (RF) technology relies on the electromagnetic properties of the materials used, which includes their complex permittivities and loss tangents. To measure these properties, techniques for material characterization such as the transmission/reflection method are used in conjunction with conversion techniques to calculate these values from scattering parameters. Unfortunately, these techniques rely on relatively expensive rectangular waveguide adaptors and components, especially if testing over large frequency ranges. This paper aims to overcome this challenge by developing a more affordable test equipment solution based on additively manufactured waveguide sections.

To evaluate the effectiveness of using additively manufactured waveguides to perform electromagnetic characterization with the transmission/reflection method, samples of PLA Tough with varying infill percentages and samples made from several Formlabs photopolymer resins are fabricated and analyzed.

Results show that the method yielded permittivity and loss tangent values for the measured materials that generally agree with those found in the literature, supporting its credibility.

The accessibility of this measurement technique will ideally allow for more electromagnetic material characterization to occur and expand the possible use of additive manufacturing in future RF designs. This work also provides characterization of several Formlabs photopolymer resins, which have not been widely analyzed in the current literature.

A low power flip-flop circuit is designed for energy-efficient devices. Digital sequential circuits are in huge demand because every processor has most of the parts of digital circuit. The sequential circuits consist of a basic data storing element, a latch is used to store single bit data. The flip-flop takes a sufficient portion of the total chip area and overall power consumption as well. This study aims to the low power energy-efficient applications like laptops, mobile phones and palmtops.

This paper proposes a new type of flip-flop that consists of the only 16 transistors with a single-phase clock. The flip-flop has two blocks, master and slave latch. In this design, the authors have focused on only master latch, which includes a level restoring circuit. It is used to help the master latch in data retention process. The latch circuit has two inverters in back-to-back arrangement. The proposed flip-flop is implemented on 65 nm complementary metal oxide semiconductor technology using Cadence Virtuoso environment and compared with other reported flip-flops.

The proposed flip-flop architecture outperformed the peak percentage, i.e. 79.25% as compared to transmission gate flip-flop and a minimum of 20.02% compared to 18 T true single phase clocking (TSPC) improvement in terms of power. It also improved C to Q delay and power delay product. In addition, by reducing the number of transistors the total area of the proposed flip-flop is reduced by a minimum of 13.76% with respect to 18TSPC and existing flip-flop. For reliability checking the Monte Carlo simulation is performed for thousand samples and it is compared with the recently reported 18TSPC flip-flop.

This work is tested by using a test circuit with a load capacitor of 0.2 fF. The proposed work uses a new topology to work as master-slave. Power consumption of this technique is very less and it is best suitable for low power applications. This circuit is working properly up to 2 GHz frequency.

The purpose of the study is to confirm the fact that in informations security, the human factor was considered as a key carrier of the majority of attacks that an information system faces. Banking and other financial services are always top among the most attractive targets for cyber attackers. Blind phishing or spear phishing is still one of the major contributors to all malicious activities in the e-banking sector. All the counter mechanisms, therefore, revolve around the concept of how security-aware the customers are. To fool these mechanisms, attacks are becoming smarter and are searching for methods where the human involvement is diminishing to zero. Zero click attacks are one big leap that attackers are taking that removes the requirement of human involvement in initiating attacks and are moving toward an era of unassisted attacks. Even though the standard procedure and protocols are built into the banking system, they fail to detect this attack resulting in significant losses.

This paper follows a conceptual review of the upcoming concept in security and its implication in e-banking sector. The methodology adopted in this paper uses review papers, articles and white papers to conclude a theoretical model. A detailed analysis of unassisted attacks is considered from 2010 onwards till 2022.

This research deliberates on the methodologies of zero click attacks and gives a detailed analysis of attack vectors and their exploits. This research also identifies the likely attacks on e-banking that these vulnerabilities can trigger.

The key contribution is toward the early detection of zero click attacks, suggesting countermeasure, reducing the likelihood of these attacks and the financial impact.