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This study aims to contribute to the numerical modelling of drop impact on a flip-chip component assembled on printed circuit boards using solder micro-bumps. This contribution is based on the introduction of non-linear fracture mechanics in the numerical approach.

The integration of non-linear fracture mechanics into the numerical approach requires the proposal and validation of several simplifying assumptions. Initially, a dynamic 3D model was simplified to a dynamic 2D model. Subsequently, the dynamic 2D model is replaced with an equivalent static 2D model. The equivalent static 2D model was used to perform calculations considering the non-linear fracture mechanics. A crack was modelled in the critical bump. The J-integral was used as a comparative parameter to study the effects of crack length, crack position and chip thickness on the fracture toughness of the solder bump.

The different simplifying assumptions were validated by comparing the results obtained by the various models. Numerical results showed a high risk of failure at the critical solder bump in a zone close to the intermetallic layer. The obtained results were in agreement with the post-test observations using the “Dye and Pry” methods.

The originality of this study lies in the introduction of non-linear fracture mechanics to model the mechanical response of solder bumps during drop impact. This study led to some interesting conclusions, highlighting the advantage of introducing non-linear fracture mechanics into the numerical simulations of microelectronic components during a drop impact.

In the electronic assembly industry, low-temperature soldering holds great potential to be used in surface mounting technology. Tin–bismuth (Sn–Bi) eutectic alloys are lead-free solders applied in consumer electronics because of their low melting point, high strength and low cost. This paper aims to investigate how to address the problem of hot tear crack formation during Sn–Bi low-temperature solder (LTS) in the mass production of consumer electronics.

This paper explored the development of hot tear cracks during Sn–Bi soldering in the fabrication of flip chip ball grid arrays. Experiments were designed to simulate various conditions encountered in Sn–Bi soldering. Quantitative analysis was conducted on the number of hot tear cracks observed in different alloy compositions and solder volumes to explore the primary cause of hot tear cracks and possible methods to suppress crack formation.

Hot tear cracks existed in Sn–Bi solders with different bismuth (Bi) contents, but increasing the solder volume reduced the number of hot tear cracks. Experiments were designed to test the degree of chip transient thermal warpage with temperature change, and, according to the results, glue was dispensed in specific areas to reduce chip warpage deformation. Finally, the results of combined process experiments pointed to an effective method of low-temperature soldering to suppress hot tear cracks.

The study focuses on Sn–Bi solders only without other solder pastes such as SAC305 or Sn–Zn series.

With the growing popularity of smart electronics, especially in intelligent terminals, new energy vehicles electronics, solar photovoltaic and other field, there will be more and more demand for low- temperature, energy-saving, lead-free solders. Therefore, this study will help the industry to roll out LTS (Sn–Bi) solutions rapidly.

In the long term, lean and green manufacturing is expected to be essential for maintaining an advanced manufacturing industry across the world. Developing new LTSs and soldering processes is the most effective, direct solution for energy conservation and emission mitigation. With the growing popularity of smart electronics, especially in intelligent terminals, new energy vehicles and solar photovoltaics, there would be an increased demand for low-temperature, energy-saving, lead-free techniques.

Although there are many methods that can be used to suppress hot tear cracks, there is little research on how to control the hot tear cracks caused by the low-temperature soldering of Sn–Bi in laptop applications. The authors studied the hot tear cracks that developed during the world’s first mass production of 50 million personal laptops based on low-temperature Sn–Bi alloy solder pastes. By controlling the Bi content, redesigning the solder paste printing process (e.g. through a printer’s stencil) and adding dispensing processes, the authors obtained reliable and stable experimental data and conclusions.

The purpose of this study is to propose a simplifying approach for modelling a reliability test. Modelling the reliability tests of printed circuit board (PCB)/microelectronic component assemblies requires the adoption of several simplifying assumptions. This study introduces and validates simplified assumptions for modeling a four-point bend test on a PCB/wafer-level chip scale packaging assembly.

In this study, simplifying assumptions were used. These involved substituting dynamic imposed displacement loading with an equivalent static loading, replacing the spherical shape of the interconnections with simplified shapes (cylindrical and cubic) and transitioning from a three-dimensional modelling approach to an equivalent two-dimensional model. The validity of these simplifications was confirmed through both quantitative and qualitative comparisons of the numerical results obtained. The maximum principal plastic strain in the solder balls and copper pads served as the criteria for comparison.

The simplified hypotheses were validated through quantitative and qualitative comparisons of the results from various models. Consequently, it was determined that the replacement of dynamic loading with equivalent static loading had no significant impact on the results. Similarly, substituting the spherical shape of interconnections with an equivalent shape and transitioning from a three-dimensional approach to a two-dimensional one did not substantially affect the precision of the obtained results.

This study serves as a valuable resource for researchers seeking to model accelerated reliability tests, particularly in the context of four-point bending tests. The results obtained in this study will assist other researchers in streamlining their numerical models, thereby reducing calculation costs through the utilization of the simplified hypotheses introduced and validated herein.

This study aims to focus on the surface mount technology (SMT) mass production process of Sn-9Zn-2.5Bi-1.5In solder. It explores it with some components that will provide theoretical support for the industrial SMT application of Sn-Zn solder.

This study evaluates the properties of solder pastes and selects a more appropriate reflow parameter by comparing the microstructure of solder joints with different reflow soldering profile parameters. The aim is to provide an economical and reliable process for SMT production in the industry.

Solder paste wettability and solder ball testing in a nitrogen environment with an oxygen content of 3,000 ppm meet the requirements of industrial production. The printing performance of the solder paste is good and can achieve a printing rate of 100–160 mm/s. When soldering with a traditional stepped reflow soldering profile, air bubbles are generated on the surface of the solder joint, and there are many voids and defects in the solder joint. A linear reflow soldering profile reduces the residence time below the melting point of the solder paste (approximately 110 s). This reduces the time the zinc is oxidized, reducing solder joint defects. The joint strength of tin-zinc joints soldered with the optimized reflow parameters is close to that of Sn-58Bi and SAC305, with high joint strength.

This study attempts to industrialize the application of Sn-Zn solder and solves the problem that Sn-Zn solder paste is prone to be oxidized in the application and obtains the SMT process parameters suitable for Sn-9Zn-2.5Bi-1.5In solder.

This study aims to simulate molded printed circuit board (PCB) warpage behavior under reflow temperature distribution. Simulation models are used to estimate dynamic warpage behavior for different form factor sizes.

This study analyzes warpage during the reflow process. The shadow moiré experiment methodology is used to collect data on the dynamic warpage performance of a model with a form factor of 10mm × 10mm × 1mm. The temperature profile with heating from 25°C to 300°C at intervals of 50°C is used, and the sample is made to undergo a cooling process until it reaches the room temperature. Subsequently, ANSYS static structural simulation is performed on similar form factor models to ascertain the accuracy of the simulation results.

Results show that the deformation and total force induced by coefficient of thermal expansion (CTE) mismatch are examined based on the warpage performance of models with different sizes, that is, 45mm × 45mm × 1mm and 45mm × 15mm × 1mm. Compared with the experimental data, the simulated modeling accuracy yields a less than 5% deviation in the dynamic warpage prediction at a reflow temperature of 300°C. Results also reveal that the larger the model, the larger the warpage changes under the reflow temperature.

The simulated warpage is limited to the temperature and force induced by CTE mismatch between two materials. The form factor of the ball-grid array model is limited to only three different sizes. The model is assumed to be steady, isothermal and static. The simulation adopts homogenous materials, as it cannot accurately model nonhomogeneous multilayered composite materials.

This study can provide engineers and researchers with a profound understanding of molded PCB warpage, minimal resource utilization and the improved product development process.

The accurate prediction of molded PCB warpage can enable efficient product development and reduce resources and production time, thereby creating a sustainable environment.

The literature review points out that warpage in various types of PCBs was successfully examined, and that considerable efforts were exerted to investigate warpage reduction in PCB modules. However, PCB warpage studies are limited to bare PCBs. To the best of the authors’ knowledge, the examination of warpage in a molded PCB designed with a molded compound cover, as depicted in Figure 3, is yet to be conducted. A molded compound provides strong lattice support for PCBs to prevent deformation during the reflow process, which is a topic of considerable interest and should be explored.

Founded in 2004, OPPO has experienced the boom of the Chinese mobile phone market, the trend of mobile Internet and the prosperity of the smartphone market. While adjusting its business structure based on changes in the market environment, it has transitioned itself from an audio device manufacturer to a smart-phone manufacturer that offers hardware, software, and service.

This case study focuses on OPPO's evolution and strategy, and provides an insight into its history, competition, and strategic choices based on whether or not OPPO should release a feature phone with a foldable display at the MWC 2019, and discusses the core competitiveness that helped OPPO succeed against the market downturn. This case study helps students understand the development of corporate strategies and the process of building core competitiveness in the microcompetition in the red ocean market. We also wish to help students understand how to come up with the most appropriate decision-making framework and conduct a critical analysis on the issues based on the internal and external factors of their businesses while they make strategic decisions. When it comes to different dimensions and indicators coming to contradictory conclusions in particular, what should the manager of a business do to make the correct strategic decision?

This paper aims to improve the life of the printed circuit boards (PCB) used in computers based on modal analysis by increasing the natural frequency of the PCB assembly.

In this work, through experiments and numerical simulations, an attempt has been made to increase the fundamental natural frequency of the PCB assembly as high as practically achievable so as to minimize the impacts of dynamic loads acting on it. An optimization tool in the finite element software (ANSYS) was used to search the specified design space for the optimal support location of the six fastening screws.

It is observed that by changing the support locations based on the optimization results the fundamental natural frequency can be raised up to 51.1% and the same is validated experimentally.

Manufacturers of PCBs used in computers fix the support locations based on symmetric feature of the board not on the dynamic behavior of the assembly. This work might lead manufacturers to redesign the location of other surface mount components.

This work provides guidelines for PCB manufacturers to finalize their support locating points which will improve the dynamic characteristics of the PCB assembly during its functioning.

This study provides a novel method to improve the life of PCB based on support locations optimization which includes majority of the surface mount components that contributes to the total mass the PCB assembly.

Twenty-first century education has been reconfigured to keep up with growing societal shifts in an effort to support a wide variety of learners. As changes occur, the workload for teachers continues to expand with little to no support and resources within classroom spaces to keep up with the current times. Post pandemic, the expectations and systems have shifted emphasizing the need for more programming around social emotional learning and systems to help mitigate the learning disruption. The insurmountable pressure placed on teachers has led to a robust and persistent departure of the profession causing the entire education system to rethink the policies, structures, and systems that influence teacher burnout.

Weak regional commercial and productive integration and monetary dependence on the economic poles are evidence of the consolidation of Latin America's peripheral position in the world economy. This research analyzes different monetary initiatives launched individually or collectively by countries in the region to alleviate this position, such as the petro, the SUCRE, or El Salvador's bet on the legal acceptance of bitcoin as a payment instrument. After identifying some of their limitations, we propose some basis for monetary coordination with which to advance in the dynamization of productivity and trade complementarity of the countries of the region.

There are several lead-free solder alloys available in the industry. Over the years, the most favorable solder composition of tin-silver-copper (Sn-Ag-Cu [SAC]) has been vastly used and accepted for joining the electronic components. It is strongly believed that the silver (Ag) content has a significant impact on the solder mechanical behavior and thus solder thermal reliability performance. This paper aims to assess the mechanical response, i.e. creep response, of the SAC solder alloys with various Ag contents.

A three-dimensional nonlinear finite element simulation is used to investigate the thermal cyclic behavior of several SAC solder alloys with various silver percentages, including 1%, 2%, 3% and 4%. The mechanical properties of the unleaded interconnects with various Ag amounts are collected from reliable literature resources and used in the analysis accordingly. Furthermore, the solder creep behavior is examined using the two famous creep laws, namely, Garofalo’s and Anand’s models.

The nonlinear computational analysis results showed that the silver content has a great influence on the solder behavior as well as on thermal fatigue life expectancy. Specifically, solders with relatively high Ag content are expected to have lower plastic deformations and strains and thus better fatigue performance due to their higher strengths and failure resistance characteristics. However, such solders would have contrary fatigue performance in drop and shock environments and the low-Ag content solders are presumed to perform significantly better because of their higher ductility.

Generally, this research recommends the use of SAC solder interconnects of high silver contents, e.g. 3% and 4%, for designing electronic assemblies continuously exposed to thermal loadings and solders with relatively low Ag-content, i.e. 1% and 2%, for electronic packages under impact and shock loadings.