Q RF inductors on 20 Ω.cm silicon realized through wafer‐level packaging techniques
Article publication date: 1 April 2003
High Q on‐chip inductors and low loss on‐chip interconnects and transmission lines are an important roadblock for the further development of Si‐based technologies at RF and microwave frequencies. In this paper, inductors are realized on standard Si wafers (20 Ω.cm) using MCM‐D processing. This consists of realizing two low K dielectric layers (BCB) and a thick Cu interconnect layer. Inductors with 5 μm lines and spaces are demonstrated for a 5 μm thick Cu layer, hereby leading to a very compact and high performance inductors: Q‐factors in the range of 25 to 30 have been obtained for inductances in the range of 1 to 5 nH. It is also shown how the Q‐factor and resonance frequency vary as a function of the inductor layout parameters and the thickness of the BCB and Cu layers. The realized 50 Ω CPW lines (lateral dimension of 40 μm) have a measured loss of only 0.2 dB/mm at 25 GHz.
Carchon, G.J., De Raedt, W. and Beyne, E. (2003), "High‐
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