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BIGNESS presents its own problems, as those engaged in overhauling Boeing 747 aircraft have already discovered. Take as an example, the problem of overhaul cadmium plating the wing outer cylinder on the main landing gear. This component is nearly 10 ft long and approximately 5 ft across, with a surface of approximately 100 square feet requiring electroplating. It was originally plated in a tank 5 ft by 6 ft by 12 ft deep, containing over 2500 gallons of solution. A tank of this capacity holds over $5000 worth of cadmium solution and nearly $15 000 worth of anodes. It requires a power supply of at least 7500 amperes. Total cost of such an installation, including cleaning and rinsing tanks, aproximates $50,000. Is any company willing to invest $50 000 in a new plating line required only to refinish one or two wing outer cylinders per month? Or, are they prepared to pack up large, cumbersome components, ship over long distances for outside plating, and wait impatiently for their return?

This characteristic is important enough in aircraft maintenance to be covered separately. Considerably less embrittlement than that in bath plating is realized in selective plating. With one proprietary solution, Cadmium LHE (Code SPS 5070), hydrogen embrittlement is almost negligible. Selectively plated nickel and nickel‐tungsten alloys also can be plated with so little hydrogen content that no baking for embrittle‐content that no baking for embrittlement relief is required.

Many bumping techniques for flip‐chip interconnections have been developed based on sputtering and electrolytic plating processes. In order to allow bumping on single chips, a new approach is adopted. Suitable metallisation layers are obtained by chemical plating techniques; bump formation is achieved by wire bonding of lead base wires or reflow melting of atomised spherical powders (solder balls). Flip‐chip modules on silicon substrate are created after reflow soldering in vacuum or in vapour phase. The quality and reliability of the interconnections are characterised by scanning electron microscopy, shear testing, microhardness measurement, non‐destructive testing, temperature and power cycling. It is found that high strength, high quality flip‐chip interconnections can be achieved. The present method is also economically competitive in comparison with sputtering techniques for the formation of metallisation layers.

Based on the outstanding results achieved to date in highly successful flight and ground test programs, GE Aircraft Engines (GEAE) will accelerate certification of the first GE90 growth engine to May 1996.

The opportunity earlier this year to gain a more complete picture of production operations at the LEITRON printed circuit board manufacturing facility in the vicinity of Schwäbisch Gmünd proved to be an enlightening, interesting and enjoyable experience. More time would have been needed to explore to advantage the town itself which dates back to the 7th century, as well as the attractively unspoilt surrounding area.

On 20 April ISHM‐Benelux held its 1988 Spring meeting at the Grand Hotel Heerlen. This meeting was totally devoted to implantable devices, in particular to the technologies used for these high reliability, extremely demanding devices. For this meeting ISHM‐Benelux was the guest of the Kerkrade facility of Medtronic. Medtronic (headquartered in Minneapolis, USA) is the world's leading manufacturer of implantable electronic devices. Apart from the assembly of pacemakers and heart‐wires, the Kerkrade facility acts as a manufacturing technology centre for Medtronic's European facilities.

The aircraft and aerospace industry still offers many unique technical challenges, resulting from the continuing drive to achieve greater all‐round performance and economy.

In order for system designers to make full use of the successive generations of semiconductor devices it is becoming increasingly necessary to choose interconnection systems that are tailored to the application. As this trend becomes more pronounced, the limitations of traditional methods of constructing boards onto which electronic components can be assembled are becoming more obvious. In this paper the application of selective electroplating, a technique that has been in use for many years but has not previously been fully exploited, is discussed. It is shown by examining a number of case studies that with a small amount of innovation this basic technique can be extended to meet the needs of a number of application areas while still operating within the normal processing windows of the materials.

In both decorative and industrial applications of gold plating, but even more critically in the latter, accurate measurement of coating thickness is of vital importance to both the manufacturer and the user. To the former, working to increasingly stringent specifications, it may, in extreme cases, mean the difference between profit and loss if an excessive thickness is inadvertently applied due to some change in electrolyte or processing conditions, or if an unduly high average thickness must be used on barrel or vat plated components to ensure a minimum requirement on functional areas. To the user, it can equally mean the difference between operational success and failure of a gold plated part if plating thickness is below specification and the means used for measurement are not sufficiently precise to detect this. Control of coating thickness in gold plating is therefore a matter of vital concern, and never more so than at the present time when, in the face of the spectacular price increases of recent years, and in the virtual absence of viable alternatives to meet the exacting demands of applications in printed circuitry, semiconductor technology and the electronics industry in general, the need for maximum economy in gold usage has become increasingly urgent, as evidenced by the vigorous efforts currently devoted to the development and improvement of selective plating techniques, and the recent interest manifest in the possible replacement of essentially pure gold coatings by alloy deposits of 18 carat and lower where these may be technically acceptable. The present article offers a wide‐ranging survey of methods available for thickness measurement, with particular reference to gold plating, but including also some techniques which, whilst not finding current use, may be of potential interest in this context. This is the second and final part of this article, the first having appeared in Volume 1, Number 1, October (1974).

The Geislingen research laboratories of Dr Ing. Max Schlötter have developed Slotoposit, a new and advanced process for the manufacture of high quality PTH circuits, using conventional subtractive techniques. The aim of the research was to remove the hazardous formaldehyde present in most electroless copper systems, to improve hole wall adhesion and process the boards in one plating operation rather than the two (panel and pattern) employed in the traditional system. The following paper describes how a stable electroless nickel has been developed to achieve these ends and to increase productivity significantly by reducing the process steps and times.