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Development of a Cost‐effective and Flexible Bumping Method for Flip‐chip Interconnections

J. Liu (IVF, Gothenburg, Sweden)

Microelectronics International

ISSN: 1356-5362

Article publication date: 1 March 1992



Many bumping techniques for flip‐chip interconnections have been developed based on sputtering and electrolytic plating processes. In order to allow bumping on single chips, a new approach is adopted. Suitable metallisation layers are obtained by chemical plating techniques; bump formation is achieved by wire bonding of lead base wires or reflow melting of atomised spherical powders (solder balls). Flip‐chip modules on silicon substrate are created after reflow soldering in vacuum or in vapour phase. The quality and reliability of the interconnections are characterised by scanning electron microscopy, shear testing, microhardness measurement, non‐destructive testing, temperature and power cycling. It is found that high strength, high quality flip‐chip interconnections can be achieved. The present method is also economically competitive in comparison with sputtering techniques for the formation of metallisation layers.


Liu, J. (1992), "Development of a Cost‐effective and Flexible Bumping Method for Flip‐chip Interconnections", Microelectronics International, Vol. 9 No. 3, pp. 25-31.




Copyright © 1992, MCB UP Limited

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